From Model to Silicon: Mastering Resource-Efficient RTL generation
Overview
Optimizing RTL code for resource efficiency starts at the modeling stage. In this webinar, we’ll explore how to leverage HDL Coder to generate high-quality RTL while maintaining performance and area constraints. We’ll share expert tips and tricks for efficient modeling, helping you avoid common pitfalls and streamline your design process.
Through an industry case study, we’ll demonstrate real-world techniques used to refine high-level models into optimized, synthesis-ready RTL. Whether you're a beginner or an experienced user, this session will provide valuable insights into improving your hardware designs. Join us to enhance your HDL coding workflow and take your efficiency to the next level!
About the Presenter
Stephan van Beek brings over 17 years of experience at MathWorks, Eindhoven, as a technical specialist addressing the Systems Engineering and Embedded Systems (i.e., ASIC, FPGA and SoC) landscape. Stephan works with customers across Europe to apply the principles of Model-Based Systems Engineering with Model-Based Design.
Prior to joining MathWorks, Stephan was a member of the electronic design methodology team at Océ-Nederland, where he focused on enhancing design workflows. His professional journey also includes a chapter at Anorad Europe BV, delving into the intricacies of motion control systems. Stephan earned his B.Sc. degree in Electrical Engineering from the Eindhoven University of Applied Sciences.
This event is part of a series of related topics. View the full list of events in this series.
