In the beginning of a project, use Simulink® Design Verifier™ to guide the design process as you build your model. Start by learning the analysis workflow, and run analysis progressively as your model grows. If you have an existing design in Simulink, see Component Selection.
Overview of the basic Simulink Design Verifier workflow.
Analyze an individual subsystem.
Analyzing an atomic subchart using Simulink Design Verifier software.
Analyzing a simple example model with Simulink Design Verifier.
Analyzing a simple model that demonstrates Simulink Design Verifier capabilities.
Describes techniques for analyzing a large model.
Analyzing an export-function models by using Simulink Design Verifier
Approximations Simulink Design Verifier performs before beginning its analysis.
Describes how Simulink Design Verifier reports approximations through validation results.
If you have a Simulink model with both logical and arithmetic operations, consider analyzing only the logical operations.
Explains how Simulink Design Verifier short-circuits logic blocks.
Describes the difference between MCDC coverage in Simulink Design Verifier and in Simulink Coverage™.
Analyzing Model blocks that reference external models.
Explains how Simulink reduces blocks during simulation and how it affects the Simulink Design Verifier analysis.
Optimize Simulink models by transforming tunable parameters into constant values.
Design Verifier does not support nonfinite data (for example,
Inf) and related operations.
An overview of techniques for analyzing large models.
Describes model characteristics that may complicate an analysis.
Explains the benefits of analyzing a model starting with low-level elements.