Handle Incompatibilities with Automatic Stubbing
What Is Automatic Stubbing?
Stubbing in Simulink® Design Verifier™ is the process of replacing certain parts of a model with simpler representations or "stubs" to facilitate analysis.
Automatic stubbing lets you analyze a model that contains objects that Simulink Design Verifier does not support. This technique allows the software to complete the analysis.
How Automatic Stubbing Works
When the Simulink Design Verifier analysis comes to an unsupported block, the software “stubs” that block. The analysis ignores the behavior of the block, and as a result, the block output can take any value.
Stub Trigonometric Function Block
Simulink
Design Verifier does not support Trigonometric Function blocks when the
Function parameter is set to
acos
, such as the one in the following
graphic.
When stubbing this block during analysis, out_signal
can
take any value, with the following
results.
Analysis Model | Result of Stubbing out_signal |
---|---|
Design error detection |
|
Test case generation |
|
Property proving |
|
Impact of Automatic Stubbing on the analysis
The following model contains a Discrete State-Space block, which is not compatible with Simulink Design Verifier.
Review Results
If you run an analysis, make sure to review the results. In the Simulink Design Verifier analysis report you can see a table of unsupported blocks that Simulink Design Verifier encounters.
Unsupported Blocks
The generated analysis report for the example model shows that the objectives are undecided because of stubbing. The Simulink Design Verifier analysis cannot generate test cases because it does not understand the operation of the Discrete State-Space block.
Objective Undecided Due to Stubbing
Achieve Complete Results
You can define custom block replacements to give a more precise definition of the unsupported blocks. For more information, follow the steps in Block Replacements for Unsupported Blocks.