Accelerate SoC Simulation by Varying Abstraction Levels

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This example shows different levels of abstraction available for SoC architecture and how to accelerate the simulation speed of SoC models by choosing the right abstraction level.

Introduction

The design and development of a System-on-Chip (SoC) design involves several steps such as algorithm development, architectural mapping, and system integration. At each step, the design is validated using modeling and simulation. In the Model-Based Design (MBD) methodology, the same model is used and refined from the early stages of the algorithm design to the final stage of complete system integration. With this single model approach, it is useful to change the level of modeling abstraction depending on the design stage. SoC Blockset provides the ability to trade off between the level of simulation detail and the simulation speed. For example, at the algorithm development stage, precise architecture simulation is not important for validating the algorithm but the same is important for validation of system requirements after architecture mapping.

Accelerate Memory Simulation

Memory Abstraction Levels

The Frame Buffer block offers three levels of abstraction for modeling memory transfers differing in simulation fidelity:

At the Burst accurate fidelity level, the memory transactions are simulated within an accuracy of a burst transaction. Memory bursts are created for the specified size and frequency and these transactions are arbitrated (by Memory Controller block) during simulation, thus offering a higher level of timing fidelity for memory transactions. The speed of simulation at this level is relatively low.
At the Protocol accurate fidelity level, the memory transactions are simulated with interface protocol accuracy and do not regard timing accuracy of memory transactions. The speed of simulation at his level of abstraction is intermediate.
At the Behavioral fidelity level, the memory transactions are simulated at behavioral level of data transfers through the memory and do not regard interfaces protocol or timing accuracy of memory transactions. The speed of simulation at his level of abstraction is high.

Select Simulation Abstraction level in Frame Buffer Block

To control the memory simulation fidelity, open the Frame Buffer block mask and find the property named Memory simulation.

When Burst accurate is selected (default), the memory is simulated with high simulation fidelity and when it is Protocol accurate, the memory is simulated with lower simulation fidelity (and even lower for Behavioral selection).

Compare Simulation Time for the Histogram Equalization Example

To illustrate the difference in execution time when the memory simulation is turned on or off, use the soc_histogram_equalization_top model from the Histogram Equalization Using Video Frame Buffer example. Execute the code below to capture the simulation duration of the model when the memory simulation is Burst accurate and then when it is Protocol accurate. After both simulations complete, a table displays execution durations and the calculated simulation acceleration.

open_system('soc_histogram_equalization_top');
set_param('soc_histogram_equalization_top','ReturnWorkspaceOutputs','on');
set_param('soc_histogram_equalization_top','StopTime','0.05');

set_param('soc_histogram_equalization_top/Frame Buffer','MemorySimulation','Burst accurate');
evalc('simOut = sim(''soc_histogram_equalization_top'')');
ExecutionTimeBurstAccurate = simOut.getSimulationMetadata.TimingInfo.ExecutionElapsedWallTime;

set_param('soc_histogram_equalization_top/Frame Buffer','MemorySimulation','Protocol accurate');
evalc('simOut = sim(''soc_histogram_equalization_top'')');
ExecutionTimeProtocolAccurate = simOut.getSimulationMetadata.TimingInfo.ExecutionElapsedWallTime;

ExecutionAcceleration = (ExecutionTimeBurstAccurate - ExecutionTimeProtocolAccurate) * 100/ ExecutionTimeBurstAccurate;
T = table(ExecutionTimeBurstAccurate, ExecutionTimeProtocolAccurate, ExecutionAcceleration,'VariableNames', ...
    {'Burst Accurate Simulation (execution time in s)','Protocol Accurate Simulation (execution time in s)','Execution Acceleration in %'});
close_system('soc_histogram_equalization_top',0);
disp(T)

    Burst Accurate Simulation (execution time in s)    Protocol Accurate Simulation (execution time in s)    Execution Acceleration in %
    _______________________________________________    __________________________________________________    ___________________________

                        160.29                                               10.372                                    93.529

The results show that turning off memory simulation in the Frame Buffer block yields a significant performance improvement.

Accelerate Task Manager Simulation

Task Manager Abstraction Levels

The Task Manager block offers two different levels of abstraction for modeling task scheduling differing in levels of simulation fidelity:

At the high simulation fidelity level, the task execution is simulated according to the scheduler policy to determine the timing accuracy including its duration, priority and preemption. The speed of simulation at this level is relatively low.
At the low simulation fidelity level, the task execution is simulated at behavioral level where tasks are executed instantaneously without regard to their priority and preemption. The speed of simulation at this level is high.

Select Simulation Abstraction level in Task Manager Block

To control the memory simulation fidelity, open the Task Manager block mask dialog and find the checkbox property named Enable task simulation.

When Enable task simulation is selected (default), the task scheduler is simulated with high fidelity and when it is cleared, the task scheduler is simulated at low fidelity level.

Compare Simulation time for the ADSB Example

To illustrate the difference in execution time when the memory simulation and task simulation are turned on or off, use the soc_ADSB model from the Packet-Based ADS-B Transceiver example. Execute the code below to capture the simulation duration of the model when the memory simulation and task simulation are turned on and then turned off. After both simulations complete, a table displays the execution durations and the calculated simulation acceleration.

open_system('soc_ADSB');
set_param('soc_ADSB','ReturnWorkspaceOutputs','on');
set_param('soc_ADSB','StopTime','0.1');

set_param('soc_ADSB/AXI4-Stream to Software','MemorySimulation','Burst accurate');
set_param('soc_ADSB/Processor/Task Manager','EnableTaskSimulation','on');
evalc('simOut = sim(''soc_ADSB'')');
ExecutionTimeBurstAccurate = simOut.getSimulationMetadata.TimingInfo.ExecutionElapsedWallTime;

set_param('soc_ADSB/AXI4-Stream to Software','MemorySimulation','Protocol accurate');
set_param('soc_ADSB/Processor/Task Manager','EnableTaskSimulation','off');
evalc('simOut = sim(''soc_ADSB'')');
ExecutionTimeBehavioral = simOut.getSimulationMetadata.TimingInfo.ExecutionElapsedWallTime;

ExecutionAcceleration = (ExecutionTimeBurstAccurate - ExecutionTimeBehavioral) * 100/ ExecutionTimeBurstAccurate;
T = table(ExecutionTimeBurstAccurate, ExecutionTimeBehavioral, ExecutionAcceleration,'VariableNames', ...
    {'Accurate Simulation (execution time in s)','Behavioral Simulation (execution time in s)','Execution Acceleration in %'});
close_system('soc_ADSB',0);
disp(T)

    Accurate Simulation (execution time in s)    Behavioral Simulation (execution time in s)    Execution Acceleration in %
    _________________________________________    ___________________________________________    ___________________________

                      35.39                                        29.135                                 17.673

The results show that turning off memory simulation in the AXI4-Stream to Software block and task simulation in the Task Manager block yields a significant performance improvement.

Conclusion

This example shows how to accelerate your SoC models by selecting different simulation-abstractions.