You can use the hardware-software co-design workflow to partition your design into parts that run on parts that run on hardware and software. The workflow does not require targeting the software part of your design because the FPGA boards do not have an embedded processor. For the standalone FPGA board, use the HDL Workflow Advisor to generate a HDL IP core from the part of your design that runs on the hardware.
Learn how to use the IP Core Generation workflow with standalone FPGA devices and embed the IP core into the reference design.
Learn the basics of the HDL Workflow Advisor and how to run various tasks.
Export, import, or configure an HDL Workflow CLI command script.