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Inter-Processor Communication Using IPC Blocks

This example shows how to use the IPC blocks to communicate between the two CPUs of Texas Instruments™ Delfino F2837xD using Simulink® models.

In this example, you will learn how to:

  • Send scalar and vector data from CPU1 using IPC Transmit block

  • Receive data at CPU2 using IPC Receive block in polling and interrupt modes

Required Hardware

  • Texas Instruments™ Delfino F2837xD controlCARDs or F28379D LaunchPad

  • A USB serial cable, if your hardware provides serial over USB capabilities

This example is configured for the Texas Instruments F28377D controlCARD with a docking station. A USB serial cable is used to establish a serial connection between the host computer and the target hardware. For more information, see Set Up Serial Communication with Target Hardware.

To select a different target hardware, in the Simulink Editor, browse to Configuration Parameters > Hardware Implementation > Hardware board.

Send Scalar and Vector Data from CPU1 Using IPC Transmit block

This example uses four different channels to transmit data from CPU1 to CPU2. A maximum of 32 channnels can be used.

Open the c2837xd_ipc_cpu1_tx model, and click Deploy to Hardware or press Ctrl+B to build and download the executable file on CPU1.

The following data is transmitted from CPU1 to CPU2:

  • A scalar uint16 counter value is sent from channel 0.

  • Scalar data of type uint32 is sent from channel 1.

  • A vector [1x10] of type uint16 is sent from channel 2.

  • A vector [1x3] of type single is sent from channel 3.

Receive Data at CPU2 Using IPC Receive Block in Polling and Interrupt Modes

1. Open the c2837xd_ipc_cpu2_rx model, and run the model in External mode.

Ensure that the correct Serial port is selected in Configuration Parameters > Hardware Implementation > Target hardware resources > External mode. For more information, see Parameter Tuning and Signal Logging with Serial External Mode.

2. Observe the output data using display blocks. The data received in CPU2 must match the data transmitted from CPU1.

Note: The channel number of the IPC Receive block on the reading CPU must match the channel number of the IPC Transmit block on the writing CPU.

More About

For inter-processor communication, the first two blocks of the global shared RAM (2x16k) are used. For larger data transfers using IPC blocks, the memory must be increased using the linker file. You can access the linker file by browsing to Configuration Parameters > Hardware Implementation > Target hardware resources > Build Options.

The current memory settings in the linker file are:

RAMGS_IPCBuffCPU1 : origin = 0x00C000, length = 0x001000

RAMGS_IPCBuffCPU2 : origin = 0x00D000, length = 0x001000

To increase the IPC memory size, allocate more memory for RAMGS_IPCBuffCPU1 and RAMGS_IPCBuffCPU2. The size of the memory must be the same in both cases.

For dual motor control using IPC blocks, see Permanent Magnet Synchronous Motor Field-Oriented Control. In this example, c28379Dpmsmfocdual_cpu1_ert.slx and c28379Dpmsmfocdual_cpu2_ert.slx models communicate using IPC.

For information about IPC blocks, see: