Using SPI to Read and Write Data to SPI EEPROM

This example shows how to configure and use SPI blocks to read and write data.

In this example, you will learn the following tasks:

  • SPI loopback using the Master Transfer block

  • Read and write data to SPI EEPROM using the Master Transfer block

  • SPI loopback using the SPI Transmit block, the SPI Receive block, and interrupts

  • Read and write data to SPI EEPROM using the SPI Transmit block, the SPI Receive block, and interrupts

Required Hardware

  • Texas Instruments™ C2000 ControlCARD or LaunchPad

  • Texas Instruments Peripheral Explorer or CAT25256 256kB SPI EEPROM Memory. This device uses a standard SPI protocol that is common to many other EEPROMs provided by different vendors. For more details about the device, refer to the CAT25256 data sheet.

Hardware Connections

The SPI EEPROM uses the following 8-bit opcodes for enable, write data, read data, and read status.

       Command  | Opcode | Operation
    _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
        WREN    | 6      | Enable Write Operations
        WRITE   | 2      | Write Data to Memory
        READ    | 3      | Read Data from Memory
        RDSR    | 5      | Read Status Register
    _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _

The hardware connections made are dependent on the EEPROM usage. You can use the SPI EEPROM provided in the TI Peripheral Explorer or a separate EEPROM chip, such as CAT25256 256kB SPI EEPROM.

Texas Instruments Peripheral Explorer

  • If the ControlCARD is inserted in the slot provided by the Peripheral Explorer, no additional connections are required.

  • If the ControlCARD is inserted in a docking station or a LaunchPad is used, SPI connections must be made between the Peripheral Explorer and the docking station or LaunchPad as listed.

    Peripheral Explorer |  C2000
 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
      ECAP-1  / SPISIMO |  SPISIMO
      ECAP-2  / SPISOMI |  SPISOMI
      ECAP-3  /  SPICLK |  SPICLK
      EPWM-6B /  SPISTE |  SPISTE
      GND               |  GND
 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _

CAT25256 256kB SPI EEPROM Memory

Connect the chip to the C2000 LaunchPad or ControlCARD as listed.

     SPI EEPROM pin |  C2000
 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
      /CS   (pin 1) |  SPISTE
      SO    (pin 2) |  SPIMISO
      /WP   (pin 3) |  3.3 V
      VSS   (pin 4) |  GND
      SI    (pin 5) |  SPIMOSI
      SCK   (pin 6) |  SPICLK
      /HOLD (pin 7) |  3.3 V
      VCC   (pin 8) |  3.3 V
 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _

SPI Loopback Using the Master Transfer Block

The Counter Limited block sends the counter value to the SPI Master Transfer block as input, and the output data received is sent to the scope. You can observe the counter value in the Scope block while running the model in External mode.

To run the model:

  1. Open the c28x_spitest_ert model. This model is configured for the TI F28379D LaunchPad hardware board. To configure the model to run on other TI C2000 processors, change the Hardware board parameter in the Configuration Parameters > Hardware Implementation pane.

  2. Browse to Hardware Implementation > Target Hardware Resources > SPI_A, and select Enable loopback. Alternatively, you can connect SIMO and SOMI physically using GPIO pins to enable external loopback.

  3. Select appropriate values for SIMO, SOMI, CLK, and STE pin assignment, depending on the processor.

  4. In the Configuration Parameters window, click Hardware Implementation > Target hardware resources > External mode and set the Serial port parameter to the COM port at Device Manager > Ports (COM & LTP) in Windows. For more information, see Parameter Tuning and Signal Logging with Serial Communication.

  5. Open Hardware tab and click Monitor & Tune. Observe the counter values on the scope.

Read and Write Data to SPI EEPROM Using the Master Transfer Block

The model writes data values of various types to the EEPROM and reads back the data from the corresponding EEPROM address to show successful communication.

SPI blocks are configured with the Data bits parameter set to 8 to send the 8-bit opcodes and write/read the 8-bit data. If you select the STE pin provided by the SPI peripheral in Configuration Parameters, the slave is deselected between data transfers. In this case, the Explicit GPIO calls option is used to select Slave select pin as GPIO1 to ensure that the slave is selected continuously for multiple data transfers.

The model consists of a Trigger Subsystem, Write EEPROM Data and Read EEPROM Data subsystems, and Display blocks. The Read EEPROM Data subsystem is always triggered, while the Write EEPROM Data subsystem is triggered only if the data read from the EEPROM does not match the input data to be written to the EEPROM.

The Write EEPROM Data subsystem performs EEPROM write enable operation before every write cycle. The input data of different types are packed in 8-bit packets using the Byte Pack block, and then the data is converted to uint16. The data is then written to the EEPROM at the address location 0x0020 using the Master Transfer block. After this, the program waits until the EEPROM write operation is complete by monitoring the status flag of the EEPROM.

The Read EEPROM Data subsystem reads data back from the memory location 0x0020, and the 8-bit packet data is unpacked to data of required type using the Byte Unpack block. This data is then shown using Display blocks.

To run the model:

  1. Open the c28x_spi_eeprom model. This model is configured for the TI F28379D LaunchPad hardware board. To configure the model to run on other TI C2000 processors, change the Hardware board parameter in the Configuration Parameters > Hardware Implementation pane.

  2. Browse to Hardware Implementation > Target Hardware Resources > SPI_A.

  3. Enter the value for Desired baud rate in bits/sec as 2000000, and set STE pin assignment to None.

  4. In the Configuration Parameters window, click Hardware Implementation and go to Target hardware resources > External mode and set the Serial port parameter to the COM port at Device Manager > Ports (COM & LTP) in Windows. For more information, see Parameter Tuning and Signal Logging with Serial Communication.

  5. Open Hardware tab and click Monitor & Tune. Observe output data in display blocks.

  6. Change the input data values and observe the changes.

SPI Loopback Using the SPI Transmit Block, the SPI Receive Block, and Interrupts

The Counter Limited block sends the counter value to the SPI Transmit block as input. The receive FIFO is configured to trigger the interrupt for a FIFO length of 4. The output data of length 4 received from the SPI Receive block is realigned as a single stream and sent to the scope. You can observe the counter value in the Scope block while running in external mode.

To run the model:

  1. Open the c28x_spi_interrupt_test_ert model. This model is configured for the TI F28379D LaunchPad hardware board. To configure the model to run on other TI C2000 processors, you can change the Hardware board parameter in the Configuration Parameters > Hardware Implementation pane.

  2. Browse to Hardware Implementation > Target Hardware Resources > SPI_A, and select Enable loopback. Alternatively, connect SIMO and SOMI physically using GPIO pins to enable external loopback.

  3. Select appropriate values for SIMO, SOMI, CLK, and STE pin assignment, depending on the processor.

  4. Select Enable Rx interrupt, and set FIFO interrupt level(Rx) to 4.

  5. In the Configuration Parameters window, click Hardware Implementation and navigate to Target hardware resources > External mode and set the Serial port parameter to the COM port at Device Manager > Ports (COM & LTP) in Windows. For more information, see Parameter Tuning and Signal Logging with Serial Communication.

  6. Open Hardware tab and click Monitor & Tune. Observe the counter values on the scope.

Read and Write Data to SPI EEPROM Using the SPI Transmit Block, the SPI Receive Block, and Interrupts

The model writes data values of various types to EEPROM and reads back data from the corresponding EEPROM address to show successful communication. This model can be used only for hardware boards with an SPI FIFO length of 15.

SPI blocks are configured with the Data bits parameter set to 8 to send the 8-bit opcodes and write/read the 8-bit data. If you select the STE pin provided by the SPI peripheral in Configuration Parameters, the slave is deselected between data transfers. In this case, the Explicit GPIO calls option is used to set Slave select pin to GPIO1 to ensure that the slave is selected continuously for multiple data transfers. The receive FIFO is configured to trigger the interrupt for a FIFO length of 15.

The model consists of Write EEPROM Data, Transmit Read Command, Read EEPROM Data, and Data Realignment subsystems along with Display blocks. Write and read data operations are triggered alternatively using the STATVAR variable.

The Write EEPROM Data subsystem performs the EEPROM write enable operation using SPI Transmit and SPI Receive blocks. Before every write cycle, block priorities are set to ensure that SPI Transmit is executed first. The input data of different types are packed in 8-bit packets using the Byte Pack block and converted to uint16. Data is then written to the EEPROM at the address location 0x0020 using the SPI Transmit block. After this, the program waits until the receive interrupt is triggered. When the receive interrupt is triggered, the data from the receive FIFO is read and discarded.

The Transmit Read Command subsystem is then triggered, which sends a read command and an address with dummy data of the size of the data to be read. After this, the program waits until the receive interrupt is triggered. When the receive interrupt is triggered, data from the receive FIFO is read.

The Data Realignment subsystem performs byte reordering to create 8-bit word packets, which are unpacked to data of required type using the Byte Unpack block. This data is then shown using display blocks.

To run the model:

  1. Open the c28x_spi_eeprom_interrupt model. This model is configured for the TI F28379D LaunchPad hardware board. To configure the model to run on other TI C2000 processors, change the Hardware board parameter in the Configuration Parameters > Hardware Implementation pane.

  2. Browse to Hardware Implementation > Target Hardware Resources > SPI_A.

  3. Enter the value for Desired baud rate in bits/sec as 2000000, and set STE pin assignment to None.

  4. Select Enable Rx interrupt, and set FIFO interrupt level(Rx) to 15.

  5. In the Configuration Parameters window, click Hardware Implementation and navigate to Target hardware resources > External mode and set the Serial port parameter to the COM port at Device Manager > Ports (COM & LTP) in Windows. For more information, see Parameter Tuning and Signal Logging with Serial Communication.

  6. Open Hardware tab and click Monitor & Tune. Observe the output data using Display blocks.

  7. Change the input data values and observe the changes.

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