Modeling
Prepare model for hardware connection, add blocks
to support hardware protocols
Blocks and simulation features for the Xilinx® Zynq® Platform.
Blocks
AXI4-Interface Read | Read data from IP core on Xilinx Zynq Platform |
AXI4-Interface Write | Write data to IP core on Xilinx Zynq Platform |
Linux Task | Spawn task function as separate Linux thread |
UDP Receive | Receive UDP packet |
UDP Send | Send UDP message |
VxWorks Task | Spawn task function as separate VxWorks thread |
AXI4-Stream IIO Write | Write AXI4-Stream Data using IIO |
AXI4-Stream IIO Read | Read AXI4-Stream Data using IIO |
Model Settings
Functions
zynqlib | Open the Simulink Library Browser to the Embedded Coder Support Package for Xilinx Zynq Platform block library |