HDL Verifier

Generate SystemVerilog DPI component from a Simulink subsystem

Since R2020b

Description

The HDL Verifier app enables you to generate a SystemVerilog DPI component from a Simulink^® subsystem.

The app toolstrip contains five sections that are representative of the HDL Verifier™ workflow.

• Map

• Prepare

• Generate

• View results

• Verify

You can use the app to perform these tasks.

• Generate a test bench for your generated DPI component by selecting Include Testbench in the Map section.

• Set code generation objectives and prepare your model for SystemVerilog DPI code generation by clicking C Code Settings or SystemVerilog Settings in the Prepare section.

• Generate the component by selecting Generate DPI Component in the Generate section.

• Set up your HDL simulation environment and simulate the generated component by using the options in the Verify section.

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Open the HDL Verifier App

Simulink Toolstrip: On the Apps tab, under Code verification, validation, and test, click HDL Verifier. The HDL Verifier app opens in its own tab on the Simulink Toolstrip.

Examples

• Get Started with SystemVerilog DPI Component Generation
• DPI Component Generation with Simulink

Version History

Introduced in R2020b