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Code Verification and Validation with PIL Using PPU

This example uses:

Open Model

This example shows you how to use SoC Blockset™ Support Package for Infineon® AURIX™ TC4x Microcontrollers for code verification and validation using processor-in-the-loop (PIL), for top model.

In this example you will learn how to configure a Simulink® model to run PIL. In a PIL simulation, the generated code runs on the TC4x TriBoards. The results of the PIL simulation are transferred to Simulink to verify the numerical equivalence of the simulation and the code generation results. The PIL verification process is a crucial part of the development cycle to ensure that the behavior of the deployment code matches the design.

This example introduces the Simulink code generation and verification workflow by showing you how to configure a Simulink model to run PIL simulations on the Infineon AURIX TC4x TriBoards.

Required Hardware

  • Infineon AURIX TC4x - TriBoards

  • Micro-USB cable

Prepare Infineon AURIX TC4x board for PIL simulation using PPU

The TriCore0 is the principal core and the remaining cores (TriCore1 to TriCore5 and PPU) act as auxillary cores. Flat model approach and single-core models using auxillary cores must deploy executable and inkable format (.elf) file of TricCore0, since the auxillary cores cannot start on their own. You can use any TriCore0 based model, enable the specific auxillary core in the device settings and deploy the elf file of TricCore0.

You can use the Getting Started with SoC Blockset Support Package for Infineon AURIX Microcontrollers example to deploy the elf file of TriCore0 by follwing these steps:

  • Open the tc4x_8ledsBlinky.slx model. Open the Configuration Parameters window by navigating to Modeling > Model Settings.

  • Set Enable PPU parameter by navigating to Hardware Implementation > Hardware board settings > Target hardware resources > Device.

Choosing a Communication Interface for PIL Simulation

Choose a communication interface by following the steps below:

1. Open the soc_tc4x_ppu_pil model. The model is configured for Infineon AURIX TC4x - TriBoards hardware.

2. To run the model on other Infineon AURIX processors, press Ctrl+E to open the Configuration Parameters dialog box and select the required hardware board by navigating to Hardware Implementation > Hardware board.

3. Navigate to Configuration Parameters > Hardware Implementation > Target Hardware Resources > Connectivity > Port, select the COM port of host computer for PIL simulations.

To find the COM port number of the USB Serial Port showing in your host computer, browse to Device Manager > Ports (COM & LPT) to find the COM port.

Verifying Top Model Code Using PIL

This example shows how to verify the generated code for a model by running a PIL simulation. With this approach:

  • You can verify code generated for a top model

  • You must configure the model to load test vectors or stimulus inputs from the MATLAB® workspace

  • You can easily switch the entire model between normal and PIL simulation mode

1. Open the soc_tc4x_ppu_pil model.

2. Choose the COM port.

3. Run the top model PIL simulation.

  • Open the Apps tab and select SIL/PIL Manager.

  • On the SIL/PIL tab, select SIL/PIL Mode > Processor-in-the-loop(PIL) option and click Run Verification.

4. When the PIL simulation is completed, a logsOut variable is created in the base workspace. The logsOut data contains PIL simulation results. You can access the logged data for signals count_a and count_b using the following commands:

  • count_a = get(logsOut,'count_a');

  • count_a.Values.Data

  • count_b = get(logsOut,'count_b');

  • count_b.Values.Data

5. Simulink generates code generation report after the completion of PIL simulation. Analyze the replacements and misses in the code replacement viewer.

6. You can view the CRL entries in the code replacement viewer.

7. Analyze the generated code to understand the code replacements used for the model.

Note

You can ignore the termination error message, which might occur during the PIL simulation.

See Also

Getting Started with SoC Blockset Support Package for Infineon AURIX Microcontrollers