Wireless Communication
R2026bYou can use SoC Blockset™ for AMD to model and simulate wireless communication applications for 5G, WLAN, and LTE. Simulate your algorithm with SoC components such as DDR memory, software tasks, RF data conversion, and AXI interfaces. You can then take additional steps to deploy your design on an SoC device.
Prototype, verify, and test practical wireless systems by using the IP core workflow with an AMD® Zynq®-based development kit and an RF FMC card. You can work with live RF signals using single (1x1) or multiple (up to 4x4) transmit and receive streams. You can also implement custom hardware designs for your SDR applications using HDL Coder™ or Embedded Coder®. Implementing on hardware enables you to test your design under real-world conditions and rapidly prototype designs for mobile and embedded applications.
Categories
- Target Zynq-Based Radios
Prototype and test SDR systems by using the IP core generation workflow
- Target AMD RFSoC Hardware
Run your MATLAB or Simulink algorithm on the AMD RFSoC target hardware
Featured Examples
Receive Signal Waveform Using DDR4 on Xilinx RFSoC Device
Design, simulate, and deploy a system to write and read the captured RF samples from external double data rate 4 (DDR4) memory in Simulink® with an SoC Blockset for AMD implementation targeted on the Xilinx® Zynq® UltraScale+™ RFSoC ZCU111 evaluation kit. In this example, you can write the captured samples of an analog-to-digital converter (ADC) into external programmable logic (PL) DDR4 memory, read the samples from the PL DDR4 memory, and send them to the processor to display. A tone signal is generated in FPGA using a numerically controlled oscillator (NCO) to verify the receive path.
Frequency Hopping Using Xilinx RFSoC Device
Design and implement frequency hopping algorithm using Xilinx® RF Data Converter numerically controlled oscillator (NCO) real time ports.
QPSK Transmit and Receive Using Zynq and FMCOMMS2/3/4
Simulate and deploy quadrature phase-shift keying (QPSK) transmit and receive algorithm using SoC Blockset for AMD.
Introduction To Custom OFDM Using AMD RFSoC
Design and verify a transmitter and receiver for a custom OFDM communication system by using SoC Blockset for AMD on AMD RFSoC device.
OFDM Transmit and Receive Using AMD RFSoC Device
Simulate and deploy OFDM transmit and receive algorithm using SoC Blockset for AMD on Xilinx RFSoC device.
Introduction to 5G NR Signal Detection using AMD RFSoC
Deploy primary synchronization signal (PSS) correlation and synchronization signal block (SSB) demodulation using SoC Blockset for AMD on Xilinx RFSoC device.
5G NR SIB1 Recovery for FR1 and FR2 Using AMD RFSoC Device
Deploy 5G NR SIB1 recovery algorithm for FR1 and FR2 using SoC Blockset for AMD on Xilinx RFSoC device.
5G NR Downlink Signal Measurements Using AMD RFSoC Device
Measure SSB signal quality and error vector magnitude (EVM) of the received resource grid using SoC Blockset for AMD on Xilinx RFSoC device.
DVB-S2 HDL PL Header Recovery Using Analog Devices AD9361/AD9364
Deploy Digital Video Broadcasting Satellite Second Generation (DVB-S2) time, frequency, and phase synchronization and PL header recovery algorithm using SoC Blockset for AMD.
DVB-S2 Receive Using AMD RFSoC Device
Simulate and deploy DVB-S2 transmit and receive algorithm using SoC Blockset for AMD on Xilinx RFSoC device.
WLAN Receiver Using AMD RFSoC Device
Simulate and deploy WLAN transmit and receive algorithm using SoC Blockset for AMD on Xilinx RFSoC device.
Packet-Based ADS-B Transceiver
Design, simulate, and deploy packet-based airplane tracking application based on ADS-B standard, partitioned between FPGA and embedded processor.
Deploy and Verify Modulation Classification on RFSoC Devices
Deploy pretrained CNN for modulation classification on AMD RFSoC device.
GPS Acquisition and Tracking Using AMD RFSoC Device
Simulate and deploy global positioning system (GPS) acquisition algorithm on ZCU111 evaluation kit.
Monitor and Analyze Applications Targeted to AMD RFSoC Devices
Monitor, analyze, and debug ADC, DAC, and valid signals of AXI4-Stream interface of RF Data Converter using FPGA data capture.
Full Duplex Data Streaming between Software and Hardware on Versal Platform
Deploy system for full duplex data streaming between hardware and software using SoC Blockset for AMD on Xilinx Versal® AI Core Series VCK190 Evaluation Kit.
