Hardware and Software Co-Design

Prototype algorithms on Zynq^® devices using HDL Coder™ and Embedded Coder^®

After you design and validate a pixel-streaming video processing algorithm in Simulink^®, you can target the design to the FPGA on the Zynq board, and generate embedded ARM^® code that interacts with the FPGA. You can route the video data to the ARM processor, and control AXI-Lite registers connected to the FPGA control logic.

Design and deploy workflow with FPGA and ARM targeting steps highlighted

Blocks

Video Capture MIPI	Import live video frames from MIPI card on Zynq-based system
Video Capture HDMI	Import live video frames from HDMI FMC card on Zynq-based
Draw Rectangle	Draw rectangles onto a video frame stored in external memory
Set ROI	Draw over specified region of a video frame stored in external memory

Classes

visionzynq Connect to Zynq hardware

Functions

`changeFPGAImage`	Load image from on-board SD card into FPGA
`downloadImage`	Write image to on-board SD card and load into FPGA

Topics

FPGA and ARM Targeting

Create Model Using Simulink Templates
Get started with a model configured for HDMI video processing.
Target FPGA on Zynq Hardware
FPGA targeting workflow using HDL Workflow Advisor.
Generate FPGA User Logic with AXI4-Stream Video Interface
This example shows how to select an AXI4-Stream Video interface for your generated FPGA user logic.
Target an ARM Processor on Zynq Hardware
Design and deploy algorithms to the ARM processor.
Models Generated from FPGA Targeting
Run Simulink models that interact with the deployed algorithms running on the FPGA.

Deep Learning

Target Deep Learning Processor and Image Preprocessing to FPGA
Reference design for processing video with a deep learning processor, including preprocessing logic in the FPGA.
Deep Learning Processing of Live Video
Reference design for processing live HDMI video with a deep learning processor, including preprocessing logic in the FPGA and postprocessing operations in the ARM processor.
Deploy and Verify YOLO v2 Vehicle Detector on FPGA
Deploy a you only look once (YOLO) v2 vehicle detector on FPGA and verify the end-to-end application using MATLAB.
Debug YOLO v2 Vehicle Detector on FPGA
Debug a vehicle detector design by viewing internal signals while the design is deployed on a board.
Integrate YOLO v2 Vehicle Detector System on SoC
Simulate a YOLO v2 vehicle detection algorithm that contains FPGA and ARM sections for deployment to an SoC device.
YOLO v2 Vehicle Detector with Live Camera Input on Zynq-Based Hardware
Deploy a YOLO v2 vehicle detection algorithm to the FPGA and ARM processor on an SoC device and process live HDMI video input.

Related Information

Hardware-Software Co-Design Workflow for SoC Platforms (HDL Coder)

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