Deploy LTE HDL Reference Applications on FPGAs and SoCs
This section contains the list of examples that show how to deploy LTE Wireless HDL Toolbox™ reference applications on FPGAs and SoCs.
LTE MIB Recovery and Cell Scanner Using Analog Devices AD9361/AD9364 (SoC Blockset): Implement an LTE master information block (MIB) recovery system partitioned across the processing system (PS) and the programmable logic (PL).
LTE SIB1 Recovery Using Analog Devices AD9361/AD9364 (SoC Blockset): Recover the first system information block (SIB1) from an LTE downlink signal.
These examples reuse the LTE Simulink® models to generate HDL for the FPGA logic. They use hardware-software co-design modeling techniques and hardware support packages to add all the software modeling and interfacing required to implement the algorithm in real-time on hardware.