Unit Delay Enabled External IC (Obsolete)

Delay signal one sample period, if external enable signal is on, with external initial condition

Compatibility

Note

The Unit Delay Enabled External IC block is not recommended. This block was removed from the Discrete library in R2016b. In new models, use the Delay block (with parameters set appropriately). Existing models that contain the Unit Delay Enabled External IC block continue to work for backward compatibility.

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Library

Additional Math & Discrete / Additional Discrete (until R2016b)

Description

The Unit Delay Enabled External IC block delays a signal by one sample period when the enable signal E is on. While the enable is off, the block holds the current state at the same value and outputs that value. The enable E is on when E is not 0, and off when E is 0.

The initial condition of this block is given by the signal IC.

You specify the time between samples with the Sample time parameter. A setting of -1 means the block inherits the Sample time.

Data Type Support

The Unit Delay Enabled External IC block accepts signals of the following data types:

• Floating point

• Built-in integer

• Fixed point

• Boolean

The data types of the inputs u and IC must be the same. The output has the same data type as u and IC.

For more information, see Data Types Supported by Simulink in the Simulink^® documentation.

Parameters

Sample time

Specify the time interval between samples. To inherit the sample time, set this parameter to -1. See Specify Sample Time in the online documentation for more information.

Characteristics

Data Types	Double | Single | Boolean | Base Integer | Fixed-Point
Sample Time	Specified in the Sample time parameter
Direct Feedthrough	Yes, of the reset input port No, of the enable input port Yes, of the external IC port
Multidimensional Signals	No
Variable-Size Signals	No
Zero-Crossing Detection	No
Code Generation	Yes