Gain
Multiply input by constant
 Library:
Simulink / Commonly Used Blocks
Simulink / Math Operations
HDL Coder / Commonly Used Blocks
HDL Coder / HDL Floating Point Operations
HDL Coder / Math Operations
Description
The Gain block multiplies the input by a constant value (gain). The input and the gain can each be a scalar, vector, or matrix.
You specify the value of gain in the Gain parameter. The Multiplication parameter lets you specify elementwise or matrix multiplication. For matrix multiplication, this parameter also lets you indicate the order of the multiplicands.
Gain is converted from doubles to the data type specified in the block mask offline using roundtonearest and saturation. The input and gain are then multiplied, and the result is converted to the output data type using the specified rounding and overflow modes.
Ports
Input
Port_1
— Input signal
scalar  vector  matrix
The Gain block accepts real or complexvalued scalar, vector, or matrix input. The Gain block supports fixedpoint data types. If the input of the Gain block is real and gain is complex, the output is complex.
Data Types: half
 single
 double
 int8
 int16
 int32
 int64
 uint8
 uint16
 uint32
 uint64
 Boolean
 fixed point
Output
Port_1
— Input multiplied by gain
scalar  vector  matrix
The Gain block outputs the input multiplied by a constant gain value. When the input to the Gain block is real and gain is complex, the output is complex.
Data Types: half
 single
 double
 int8
 int16
 int32
 int64
 uint8
 uint16
 uint32
 uint64
 Boolean
 fixed point
Parameters
Main
Gain
— Value by which to multiply the input
1
(default)  real or complexvalued scalar, vector, or
matrix
Specify the value by which to multiply the input. Gain can be a real or complexvalued scalar, vector, or matrix.
Programmatic Use
Block Parameter:
Gain 
Type: character vector 
Values:
'1'  real or complexvalued scalar, vector, or
matrix 
Default:
'1' 
Multiplication
— Specify the multiplication mode
Elementwise(K.*u)
(default)  Matrix(K*u)
 Matrix(u*K)
 Matrix(K*u) (u vector)
Specify one of these multiplication modes:
Elementwise(K.*u)
— Each element of the input is multiplied by each element of the gain. The block performs expansions, if necessary, so that the input and gain have the same dimensions.Matrix(K*u)
— The input and gain are matrixmultiplied with the input as the second operand.Matrix(u*K)
— The input and gain are matrixmultiplied with the input as the first operand.Matrix(K*u) (u vector)
— The input and gain are matrix multiplied with the input as the second operand. This mode is identical toMatrix(K*u)
, except for how dimensions are determined.Suppose that
K
is anmbyn
matrix.Matrix(K*u)(u vector)
sets the input to a vector of lengthn
and the output to a vector of lengthm
. In contrast,Matrix(K*u)
uses propagation to determine dimensions for the input and output. For anmbyn
gain matrix, the input can propagate to annbyq
matrix, and the output becomes anmbyq
matrix.
Programmatic Use
Parameter:
Multiplication

Type: character vector 
Value:
'Elementwise(K.*u)'  'Matrix(K*u)'  'Matrix(u*K)' 
'Matrix(K*u) (u vector)' 
Default:
'Elementwise(K.*u)'

Sample time
— Specify sample time as a value other than 1
1
(default)  scalar  vector
Specify the sample time as a value other than 1. For more information, see Specify Sample Time.
Dependencies
This parameter is not visible unless it is explicitly set to a value other than
1
. To learn more, see Blocks for Which Sample Time Is Not Recommended.
Programmatic Use
Block Parameter:
SampleTime 
Type: character vector 
Values: scalar or vector 
Default:
'1' 
Signal Attributes
Output minimum
— Minimum output value for range checking
[]
(default)  scalar
Lower value of the output range that Simulink^{®} checks.
Simulink uses the minimum to perform:
Parameter range checking (see Specify Minimum and Maximum Values for Block Parameters) for some blocks.
Simulation range checking (see Specify Signal Ranges and Enable Simulation Range Checking).
Automatic scaling of fixedpoint data types.
Optimization of the code that you generate from the model. This optimization can remove algorithmic code and affect the results of some simulation modes such as SIL or external mode. For more information, see Optimize using the specified minimum and maximum values (Embedded Coder).
Note
Output minimum does not saturate or clip the actual output signal. Use the Saturation block instead.
Programmatic Use
Block Parameter:
OutMin 
Type: character vector 
Values: '[ ]' 
scalar 
Default: '[ ]' 
Output maximum
— Maximum output value for range checking
[]
(default)  scalar
Upper value of the output range that Simulink checks.
Simulink uses the maximum value to perform:
Parameter range checking (see Specify Minimum and Maximum Values for Block Parameters) for some blocks.
Simulation range checking (see Specify Signal Ranges and Enable Simulation Range Checking).
Automatic scaling of fixedpoint data types.
Optimization of the code that you generate from the model. This optimization can remove algorithmic code and affect the results of some simulation modes such as SIL or external mode. For more information, see Optimize using the specified minimum and maximum values (Embedded Coder).
Note
Output maximum does not saturate or clip the actual output signal. Use the Saturation block instead.
Programmatic Use
Block Parameter:
OutMax 
Type: character vector 
Values: '[ ]' 
scalar 
Default: '[ ]' 
Output data type
— Specify the output data type
Inherit: Inherit via internal
rule
(default)  Inherit: Keep MSB
 Inherit: Match scaling
 Inherit: Inherit via back
propagation
 Inherit: Same as input
 double
 single
 half
 int8
 uint8
 int16
 uint16
 int32
 int64
 uint64
 uint32
 fixdt(1,16)
 fixdt(1,16,0)
 fixdt(1,16,2^0,0)
 <data type expression>
Choose the data type for the output. The type can be inherited,
specified directly, or expressed as a data type object such as
Simulink.NumericType
.
When you select an inherited option, the block exhibits these behaviors:
Inherit: Inherit via internal rule
— Simulink chooses a data type to balance numerical accuracy, performance, and generated code size, while taking into account the properties of the embedded target hardware. If you change the embedded target settings, the data type selected by the internal rule might change. For example, if the block multiplies an input of typeint8
by a gain ofint16
andASIC/FPGA
is specified as the targeted hardware type, the output data type issfix24
. IfUnspecified (assume 32bit Generic)
, in other words, a generic 32bit microprocessor, is specified as the target hardware, the output data type isint32
. If none of the word lengths provided by the target microprocessor can accommodate the output range, Simulink software displays an error in the Diagnostic Viewer.Inherit: Keep MSB
– Simulink chooses a data type that maintains the full range of the operation, then reduces the precision of the output to a size appropriate for the embedded target hardware.Tip
For more efficient generated code, deselect the Saturate on integer overflow parameter.
This rule never produces overflows.
Inherit: Match scaling
– Simulink chooses a data type whose scaling matches the scaling of the input types. If the full range of the type does not fit on the embedded target hardware, the range is reduced yielding a type appropriate for the embedded target hardware. This rule can produce overflows.It is not always possible for the software to optimize code efficiency and numerical accuracy at the same time. If these internal rules do not meet your specific needs for numerical accuracy or performance, use one of the following options:
Specify the output data type explicitly.
Use the simple choice of
Inherit: Same as input
.Explicitly specify a default data type such as
fixdt(1,32,16)
and then use the FixedPoint Tool to propose data types for your model. For more information, seefxptdlg
(FixedPoint Designer).To specify your own inheritance rule, use
Inherit: Inherit via back propagation
and then use a Data Type Propagation block. Examples of how to use this block are available in the Signal Attributes library Data Type Propagation Examples block.
Inherit: Inherit via back propagation
— Use data type of the driving block.Inherit: Same as input
— Use data type of input signal.
Dependencies
When input is a floatingpoint data type smaller than single
precision, the Inherit: Inherit via internal
rule
output data type depends on the setting of
the Inherit floatingpoint output type smaller than single precision configuration parameter. Data types are smaller than single
precision when the number of bits needed to encode the data type is
less than the 32 bits needed to encode the singleprecision data
type. For example, half
and
int16
are smaller than single
precision.
Programmatic Use
Block Parameter:
OutDataTypeStr 
Type: character vector 
Values: 'Inherit: Inherit via internal
rule'  'Inherit: Keep MSB' 
'Inherit: Match scaling' 
'Inherit: Same as input' 
'Inherit: Inherit via back propagation' 
'single'  'half' 
'int8'  'uint8' 
'int16'  'uint16' 
'int32'  'uint32' 
'int64'  'uint64' 
'fixdt(1,16)' 
'fixdt(1,16,0)' 
'fixdt(1,16,2^0,0)'  '<data
type expression>' 
Default: 'Inherit:
Inherit via internal rule' 
Lock output data type setting against changes by the fixedpoint tools
— Prevent fixedpoint tools from overriding Output data type
off
(default)  on
Select this parameter to prevent the fixedpoint tools from overriding the Output data type you specify on the block. For more information, see Use Lock Output Data Type Setting (FixedPoint Designer).
Programmatic Use
Block Parameter:
LockScale 
Type: character vector 
Values:
'off'  'on' 
Default:
'off' 
Integer rounding mode
— Rounding mode for fixedpoint operations
Floor
(default)  Ceiling
 Convergent
 Nearest
 Round
 Simplest
 Zero
Specify the rounding mode for fixedpoint operations. For more information, see Rounding (FixedPoint Designer).
Block parameters always round to the nearest representable value. To control the rounding of a block parameter, enter an expression using a MATLAB^{®} rounding function into the mask field.
Programmatic Use
Block Parameter:
RndMeth 
Type: character vector 
Values:
'Ceiling'  'Convergent'  'Floor'  'Nearest'  'Round'  'Simplest' 
'Zero' 
Default:
'Floor' 
Saturate on integer overflow
— Method of overflow action
off
(default)  on
Specify whether overflows saturate or wrap.
Action  Rationale  Impact on Overflows  Example 

Select this check box ( 
Your model has possible overflow, and you want explicit saturation protection in the generated code. 
Overflows saturate to either the minimum or maximum value that the data type can represent. 
The maximum value that the 
Do not select this check box ( 
You want to optimize efficiency of your generated code. You want to avoid overspecifying how a block handles outofrange signals. For more information, see Troubleshoot Signal Range Errors. 
Overflows wrap to the appropriate value that is representable by the data type. 
The maximum value that the 
When you select this check box, saturation applies to every internal operation on the block, not just the output, or result. Usually, the code generation process can detect when overflow is not possible. In this case, the code generator does not produce saturation code.
Programmatic Use
Block Parameter: SaturateOnIntegerOverflow 
Type: character vector 
Values:
'off'  'on' 
Default: 'off' 
Parameter Attributes
Parameter minimum
— Specify the minimum value of gain
[]
(default)  scalar
Specify the minimum value of gain. The default value is
[]
(unspecified). Simulink uses this value to perform:
Parameter range checking (see Specify Minimum and Maximum Values for Block Parameters)
Automatic scaling of fixedpoint data types
Programmatic Use
Block Parameter:
ParamMin 
Type: character vector 
Value: scalar 
Default: '[
]' 
Parameter maximum
— Specify the maximum value of gain
[]
(default)  scalar
Specify the maximum value of gain. The default value is
[]
(unspecified). Simulink uses this value to perform:
Parameter range checking (see Specify Minimum and Maximum Values for Block Parameters)
Automatic scaling of fixedpoint data types
Programmatic Use
Block Parameter:
ParamMax 
Type: character vector 
Value: scalar 
Default: '[
]' 
Parameter data type
— Specify the data type of the Gain parameter
Inherit: Inherit via internal
rule
(default)  Inherit: Same as input
 Inherit: Inherit from 'Gain'
 double
 single
 half
 int8
 uint8
 int16
 uint16
 int32
 uint32
 int64
 uint64
 fixdt(1,16)
 fixdt(1,16,0)
 fixdt(1,16,2^0,0)
 <data type expression>
Specify the data type of the Gain parameter.
Programmatic Use
Block Parameter:
ParamDataTypeStr 
Type: character vector 
Values: 'Inherit: Inherit via internal
rule  'Inherit: Same as input'
 'Inherit: Inherit via back propagation' 
'single'  'half' 
'int8'  'uint8' 
'int16'  'uint16' ,
'int32'  'uint32' 
'int64'  'uint64' 
'fixdt(1,16)' 
'fixdt(1,16,0)' 
'fixdt(1,16,2^0,0)'  '<data
type expression>' 
Default: 'Inherit:
Inherit via internal rule' 
Model Examples
Block Characteristics
Data Types 

Direct Feedthrough 

Multidimensional Signals 

VariableSize Signals 

ZeroCrossing Detection 

Extended Capabilities
C/C++ Code Generation
Generate C and C++ code using Simulink® Coder™.
HDL Code Generation
Generate Verilog and VHDL code for FPGA and ASIC designs using HDL Coder™.
HDL Coder™ provides additional configuration options that affect HDL implementation and synthesized logic.
You can use a tunable parameter in a Gain block intended for HDL code generation. For details, see Generate DUT Ports for Tunable Parameters (HDL Coder).
ConstMultiplierOptimization  Description 

none (Default)  By default, HDL Coder does not perform CSD or FCSD optimizations. Code generated for the Gain block retains multiplier operations. 
csd  When you specify this option, the generated code decreases the area used by the model while maintaining or increasing clock speed, using canonical signed digit (CSD) techniques. CSD replaces multiplier operations with add and subtract operations. CSD minimizes the number of addition operations required for constant multiplication by representing binary numbers with a minimum count of nonzero digits. 
fcsd  This option uses factored CSD (FCSD) techniques, which replace multiplier operations with shift and add/subtract operations on certain factors of the operands. These factors are generally prime but can also be a number close to a power of 2, which favors area reduction. You can achieve a greater area reduction with FCSD at the cost of decreasing clock speed. 
auto  When you specify this option, the coder chooses between
the CSD or FCSD optimizations. The coder chooses the
optimization that yields the most areaefficient
implementation, based on the number of adders required. When
you specify 
General  

ConstMultiplierOptimization  Canonical signed digit (CSD) or factored CSD optimization. The
default is 
ConstrainedOutputPipeline  Number of registers to place at
the outputs by moving existing delays within your design. Distributed
pipelining does not redistribute these registers. The default is

DSPStyle  Synthesis attributes for multiplier mapping. The default is 
InputPipeline  Number of input pipeline stages
to insert in the generated code. Distributed pipelining and constrained
output pipelining can move these registers. The default is

OutputPipeline  Number of output pipeline stages
to insert in the generated code. Distributed pipelining and constrained
output pipelining can move these registers. The default is

Note
For certain values of the Gain parameter, native
floating point implements the algorithm differently instead of using
multipliers. For example, if you set the Gain parameter
to 1
, the generated model uses a wire to pass the input
to the output. If you set the Gain parameter to
1
, the generated model shows a Unary
Minus block that inverts the polarity of the input signal. This
implementation reduces the latency and resource usage on the target
platform.
Native Floating Point  

HandleDenormals  Specify whether you want HDL Coder to insert additional logic to handle denormal numbers in your design.
Denormal numbers are numbers that have magnitudes less than the smallest floatingpoint
number that can be represented without leading zeros in the mantissa. The default is

LatencyStrategy  Specify whether to map the blocks in your design to 
NFPCustomLatency  To specify a value, set
LatencyStrategy to 
MantissaMultiplyStrategy  Specify how to implement the mantissa multiplication operation during code generation.
By using different settings, you can control the DSP usage on the target FPGA device.
The default is 
This block supports code generation for complex signals.
PLC Code Generation
Generate Structured Text code using Simulink® PLC Coder™.
FixedPoint Conversion
Design and simulate fixedpoint systems using FixedPoint Designer™.
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