Analog-to-Digital Converter (ADC)
Embedded Coder® Support Package for Texas Instruments™ C2000™ Processors/ C280x
Embedded Coder Support Package for Texas Instruments C2000 Processors/ C2833x
The ADC block configures the ADC to perform analog-to-digital conversion of signals connected to the selected ADC input pins. The ADC block outputs digital values representing the analog input signal and stores the converted values in the result register of your digital signal processor. You use this block to capture and digitize analog signals from external sources such as signal generators, frequency generators, or audio devices. With the C2833x, you can configure the ADC to use the processor DMA module to move data directly to memory without using the CPU. This frees the CPU to perform other tasks and increases overall system capacity.
The output of the ADC is a vector of
uint16 values. The
output values are in the range 0 to 4095 because the ADC is 12-bit converter.
The ADC block supports ADC operation in dual and cascaded modes. In dual mode, either
A or module
B can be used for
the ADC block, and two ADC blocks are allowed in the model. In cascaded mode, both module
A and module
B are used for a
single ADC block.
Specifies which DSP module to use:
A — Displays the ADC channels in module A
(ADCINA0 through ADCINA7).
B — Displays the ADC channels in module B
(ADCINB0 through ADCINB7).
A and B — Displays the ADC channels in
both modules A and B (ADCINA0 through ADCINA7 and ADCINB0 through
Type of sampling to use for the signals:
Sequential — Samples the selected channels
Simultaneous — Samples the corresponding
channels of modules A and B at the same time.
Type of signal that triggers conversions to begin:
Software — Signal from software.
Conversion values are updated at each sample time.
ePWM#A_ePWM#B — Start of conversion is
controlled by user-defined PWM events.
XINT2_ADCSOC — Start of conversion is
controlled by the
XINT2_ADCSOC external signal pin.
The choices available in Start of conversion depend on the Module setting. The following table summarizes the available choices. For each set of Start of conversion choices, the default is given first.
|Module Setting||Start of Conversion Choices|
Time in seconds between consecutive sets of samples that are converted for the
selected ADC channel(s). This is the rate at which values are read from the result
registers. To execute this block asynchronously, set Sample
-1, check the Post interrupt at
the end of conversion box.
To set different sample times for different groups of ADC channels, you must add separate ADC blocks to your model and set the desired sample times for each block.
Date type of the output data. Valid data types are
Select this check box to post an asynchronous interrupt at the end of the set of
conversions. The interrupt is posted at the end of conversion. To execute this block
asynchronously, set Sample Time to
Number of ADC channels to use for analog-to-digital conversions.
Specific ADC channel to associate with each conversion number.
In oversampling mode, a signal at a given ADC channel can be sampled multiple times during a single conversion sequence. To oversample, specify the same channel for more than one conversion. Converted samples are output as a single vector.
If more than one ADC channel is used for conversion, you can use separate ports for each output and show the output ports on the block. If you use more than one channel and do not use multiple output ports, the data is output in a single vector.