Deploy NR HDL Reference Applications on FPGAs and SoCs

This section contains the list of examples that show how to deploy 5G Wireless HDL Toolbox™ reference applications on FPGAs and SoCs.

• Introduction to 5G NR Signal Detection using AMD RFSoC (SoC Blockset): Deploy the primary synchronization signal (PSS) correlation and synchronization signal block (SSB) demodulation algorithm.

• Introduction to 5G NR Signal Detection on NI USRP Radio (Wireless Testbench): Deploy the primary synchronization signal (PSS) correlation and synchronization signal block (SSB) demodulation algorithm.

• 5G NR MIB Recovery Using Analog Devices AD9361/AD9364 (SoC Blockset): Deploy the MIB recovery algorithm.

• 5G NR SIB1 Recovery Using Analog Devices AD9361/AD9364 (SoC Blockset): Deploy the system information block 1 (SIB1) recovery algorithm.

• 5G NR SIB1 Recovery for FR1 and FR2 Using AMD RFSoC Device (SoC Blockset): Deploy the 5G NR SIB1 recovery algorithm for FR1 and FR2.

• 5G NR Downlink Signal Measurements Using AMD RFSoC Device (SoC Blockset): Measure SSB signal quality and error vector magnitude (EVM) of the received resource grid.

For a more detailed description of the algorithm, see the NR HDL Downlink Receiver MATLAB Reference example.

These examples reuse the 5G Simulink® models to generate HDL for the FPGA logic. They use hardware-software co-design modeling techniques and hardware support packages to add all the software modeling and interfacing required to implement the algorithm in real-time on hardware.

Related Topics

• NR HDL Reference Applications Overview
• NR HDL Receiver Performance