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Deploy NR HDL Reference Applications on FPGAs and SoCs

This section contains the list of examples that show how to deploy 5G Wireless HDL Toolbox™ reference applications on FPGAs and SoCs.

For a more detailed description of the algorithm, see the NR HDL Downlink Receiver MATLAB Reference example.

These examples reuse the 5G Simulink® models to generate HDL for the FPGA logic. They use hardware-software co-design modeling techniques and hardware support packages to add all the software modeling and interfacing required to implement the algorithm in real-time on hardware.

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