Wireless HDL Toolbox™ (formerly LTE HDL Toolbox™) provides pre-verified, hardware-ready Simulink® blocks and subsystems for developing 5G, LTE, WLAN, satellite, and custom OFDM-based wireless communication applications. It includes reference applications, IP blocks, and gateways between frame- and sample-based processing.
You can modify the reference applications for integration into your own design. HDL implementations of the toolbox algorithms are optimized for efficient resource usage and performance for prototyping or for production deployment on FPGA, ASIC, and SoC devices.
The toolbox algorithms are designed to generate readable, synthesizable code in VHDL® and Verilog® (with HDL Coder™). For over-the-air testing, you can connect transmitter and receiver models to radio devices (with Communications Toolbox™ hardware support packages).
5G New Radio (NR)
Integrate prebuilt and verified 5G NR subsystem IP for cell search and master/system information block (MIB/SIB1) recovery. Design custom hardware with 5G NR IP blocks such as LDPC, Polar and CRC.
Transmit and receive data using orthogonal frequency division multiplexing (What is OFDM? (5:16)) hardware subsystem IP. Design custom OFDM-based FPGA or ASIC hardware using HDL-optimized IP blocks.
Design satellite communications based on DVB-S2 and CCSDS for FPGA or ASIC implementation. Integrate subsystem IP such as a DVB-S2 Receiver, or develop your own using HDL-optimized IP blocks.
Develop wireless LAN communications systems for FPGA or ASIC hardware. Get started with a WLAN receiver or time and frequency synchronization subsystem, or create custom functionality with IP blocks.
Integrate prebuilt and verified 4G LTE subsystem hardware IP for cell search, master/system information block (MIB/SIB1) recovery, or a multiple-output (MIMO) LTE transmitter.
Use hardware-proven building block IP to develop custom communications systems. Get started quickly with example designs such as a digital pre-distorter (DPD), and a variable-size FFT.
Simulate hardware-ready models while comparing results against the MATLAB reference algorithms. Use HDL Verifier to cosimulate with the generated HDL or to generate models (5:45) for RTL verification.
FPGA, ASIC, and SoC Deployment
Use HDL Coder to target your application to FPGA-based software-defined radio (SDR) platforms (34:04) to prototype with live over-the-air signals and reuse the same models for production deployment.
“We accelerated implementation by adapting the LTE golden reference model from Wireless HDL Toolbox™ and deploying it to a Zynq® UltraScale+™ RFSoC board using HDL Coder™. This approach saved us at least a year of engineering effort and enabled me to complete the implementation myself without having to hire an additional digital engineer”Matthew Weiner, RF Pixels