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Debug and Verify FPGA Algorithms with MATLAB and Simulink

Amelia Dalton, EE Journal
Eric Cigan, MathWorks

MATLAB® and Simulink® are widely used by engineers and system designers who want to target algorithms to FPGAs. Test benches built in MATLAB and Simulink can be used to verify correct implementation of algorithms, and also to test implementations in FPGA hardware.

In this video, a MathWorks engineer demonstrates how to use a variety of verification and testing techniques.

  • Cosimulation of Simulink with HDL simulators like Mentor® ModelSim®/Questa® and Cadence® Incisive®/Xcelium® helps you verify RTL against Simulink models.
  • FPGA-in-the-Loop simulation helps you program your HDL code into FPGA boards from Xilinx®, Intel®, and Microsemi®, and to apply a MATLAB or Simulink test bench for verification.
  • FPGA Data Capture helps you insert probes into your HDL code so you can perform hardware testing and load internal signals into your MATLAB session for further analysis.
  • MATLAB AXI Master gives you the ability to control IP cores programmed into FPGA and SoC boards, and to read from and write to AXI registers and off-chip memories on boards to perform interactive testing from MATLAB.


Related Products

  • HDL Verifier
  • HDL Coder

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Learn more about FPGA design with MATLAB and Simulink
Verification Horizons Technical Article
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