setCaptureConditionComparisonOperator

Configure operator that compares individual signal values within capture condition

Since R2024a

Syntax

setCaptureConditionComparisonOperator(hub,signalName,operator)

setCaptureConditionComparisonOperator(hub,signalName,operator,DataCaptureName=dataCaptureIPName)

Description

setCaptureConditionComparisonOperator(hub,signalName,operator) configures a comparison operator operator that compares individual signal values within the capture condition for the first data capture IP. hub is a customized data capture hub object. signalName is the name of a capture component signal.

setCaptureConditionComparisonOperator(hub,signalName,operator,DataCaptureName=dataCaptureIPName) a comparison operator operator that compares individual signal values within the capture condition for a data capture IP specified by dataCaptureIPName.

Examples

Set Up Capture Conditions Using Comparison Operator for Multiple Data Capture IPs

This example uses a customized data capture hub object, hub, that connects with two data capture IPs. The first data capture IP is datacapture1 and the second data capture IP is datacapture2. Each IP defines two signals for both trigger and data capture. Signal A is 1 bit and signal B is 8 bits.

Enable capture condition logic for the datacpture1 IP.

setEnableCaptureCtrl(hub,true);

To enable capture condition logic, you must select the Include capture condition logic parameter while generating the data capture IPs using the FPGA Data Capture Component Generator tool.

Enable capture condition logic for the datacpture2 IP.

setEnableCaptureCtrl(hub,true,DataCaptureName="datacapture2");

Set up a capture condition to capture data when the FPGA detects a high value on signal A at the same time as signal B is greater than 7. Set this condition for the datacapture1 IP.

setCaptureCondition(hub,'A',true,'High');
setCaptureCondition(hub,'B',true,7);
setCaptureConditionComparisonOperator(hub,'B','>');

Set up a capture condition to capture data when the FPGA detects a high value on signal A at the same time as signal B is greater than 7. Set this condition for the datacapture2 IP.

setCaptureCondition(hub,'A',true,'High',DataCaptureName="datacapture2");
setCaptureCondition(hub,'B',true,7,DataCaptureName="datacapture2");
setCaptureConditionComparisonOperator(hub,'B','>', ...
DataCaptureName="datacapture2");

Input Arguments

hub — Data capture hub object

dataCaptureHub object

Data capture hub object that interacts with each data capture IP, specified as a dataCaptureHub object.

signalName — Name of capture component signal

character vector

Name of the capture component signal, specified as a character vector.

This name must match one of the signal names configured on creation of the data capture IPs using the FPGA Data Capture Component Generator tool. The signal must be configured as a possible trigger signal.

operator — Operator to compare signals within capture condition

== (default) | != | < | > | <= | >=

Operator to compare signals within the capture condition, specified as one of these operators: ==, !=, <, >, <=, or >=.

The capture condition comprises value comparisons of one or more signals. For a multibit signal, specify one of these operators: == (default), !=, <, >, <=, or >=. For a capture condition containing X or x (which indicate bits for the function to ignore), specify either the == or != operators. For a logical signal, specify either the == or != operators. For details on capture conditions, see Capture Conditions.

dataCaptureIPName — Name of data capture IP

"generatedIPName1" (default) | character vector | string scalar

Name of the data capture IP, specified as a character vector or string scalar. The default value for this argument is "generatedIPName1", where generatedIPName1 is the name of the first data capture IP set by the Generated IP name parameter of the FPGA Data Capture Component Generator tool.

Version History

Introduced in R2024a