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Xilinx FPGA Board Support from HDL Verifier

HDL Verifier™ automates the verification of HDL code on FPGA boards by providing connections between your FPGA board and your simulations in Simulink® or MATLAB®.

  • FPGA-in-the-loop (FIL) enables you to run a Simulink or MATLAB simulation that is synchronized with an HDL design running on an FPGA board.

  • FPGA data capture is a way to observe signals from your design while the design is running on the FPGA. It captures a window of signal data from the FPGA, based on your configuration and trigger settings, and returns the data to MATLAB or Simulink.

  • AXI manager provides access to live on-board memory locations from Simulink or MATLAB. You must include the AXI manager IP in your FPGA design.

To use each of these features, you must have a supported FPGA board connected to your MATLAB host computer using a supported connection type, and a supported synthesis tool.

Supported Xilinx FPGA Boards

This support package enables FIL simulation, FPGA data capture, and AXI manager for the boards in the table.

FPGA data capture and AXI manager are supported for Xilinx® devices using Vivado® projects. Xilinx ISE projects are not supported.


  • AXI manager and FPGA data capture in HDL Workflow Advisor support programmable logic (PL) Ethernet only. Processing system (PS) Ethernet is not supported.

  • FPGA data capture in HDL Workflow Advisor supports the GMII and MII interfaces. The SGMII interface is not supported.

Device FamilyBoardEthernetJTAG PCI ExpressUSB EthernetComments
FILFPGA Data CaptureAXI ManagerFILFPGA Data CaptureAXI ManagerFILaFPGA Data CaptureAXI ManagerFILAXI Manager

Xilinx Artix®-7

Digilent® Nexys™ 4 Artix-7

Artix-7 35T Arty FPGA Evaluation Kit      

Xilinx Kintex®-7

Kintex-7 FPGA KC705 Evaluation Kit    

Xilinx Kintex UltraScale™

Kintex UltraScale FPGA KCU105 Evaluation Kit


Xilinx Kintex UltraScale+™

Kintex UltraScale+ FPGA KCU116 Evaluation Kit

      For more information, see PCI Express AXI Manager.

Xilinx Spartan®-6

Spartan-6 SP605           
Spartan-6 SP601           
XUP Atlys Spartan-6           

Xilinx Spartan-7

Digilent Arty S7-25         

Xilinx Virtex® UltraScale

Virtex UltraScale FPGA VCU108 Evaluation Kit


Xilinx Virtex UltraScale+

Virtex UltraScale+ FPGA VCU118 Evaluation Kit


Xilinx Virtex-7

Virtex-7 FPGA VC707 Evaluation Kit    
Virtex-7 FPGA VC709 Connectivity Kit       

Xilinx Virtex-6

Virtex-6 FPGA ML605 Evaluation Kit           

Xilinx Virtex-5

Virtex ML505           
Virtex ML506           
Virtex ML507           
Virtex XUPV5–LX110T           

Xilinx Virtex-4

Virtex ML401          


Support for Virtex-4 device family will be removed in a future release.

Virtex ML402          
Virtex ML403          

Xilinx Zynq®

Zynq-7000 SoC ZC702 Evaluation Kit


This board supports PS Ethernet.

Zynq-7000 SoC ZC706 Evaluation Kit    

This board supports PS Ethernet.


Use the USB port marked "PROG" for programming.

This board supports PS Ethernet.

ZYBO™ Zynq-7000 Development Board

PicoZed™ SDR Development Kit         
MiniZed™         Supported only for FPGA data capture and AXI manager via FTDI JTAG.

Xilinx Zynq UltraScale+

Zynq UltraScale+ MPSoC ZCU102 Evaluation Kit


This board supports PS Ethernet.

Zynq UltraScale+ MPSoC ZCU104 Evaluation Kit


Zynq UltraScale+ MPSoC ZCU106 Evaluation Kit


Zynq UltraScale+ RFSoC ZCU111 Evaluation Kit


This board supports PS Ethernet.

Zynq UltraScale+ RFSoC ZCU216 Evaluation Kit


This board supports PS Ethernet.

Xilinx Versal®

Versal AI Core Series VCK190 Evaluation Kit


a FIL over PCI Express® connection is supported only for 64-bit Windows® operating systems.

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