Out Bus Element, Bus Element Out

Specify signal that connects to output port

• Library:

• Simulink / Ports & Subsystems

  Simulink / Sinks

  HDL Coder / Ports & Subsystems

  HDL Coder / Sinks

• 

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Description

The Out Bus Element block, also known as the Bus Element Out block, combines the functionality of an Outport block and a Bus Creator block. This block is of the Outport block type and all Out Bus Element blocks that use the same port share a dialog box.

The output of an Out Bus Element is a virtual bus, regardless of the number and type of signals connected to it. You must connect an Out Bus Element block to each signal that you want the bus to contain.

Create Port and Related Blocks

When you insert an Out Bus Element block, the block label populates with default values. The label consists of two interactive text fields: the port name and the bus element. To change the name of the port associated with the block, edit the first text field in the label by clicking the text.

To output multiple signals in a bus, create one Out Bus Element block for each signal that you want to include in the bus. In the Block Parameters dialog box, you can select the Add a new signal or Add a new sub-bus buttons. Alternatively, hold Ctrl while you drag an existing Out Bus Element block to a new location. Upon releasing the mouse, click Use Existing Port.

If multiple blocks are associated with the same port and you change the name of the port, all blocks that share the port update to reflect the new port name.

To create a port, hold Ctrl while you drag an existing Out Bus Element block to a new location. Upon releasing the mouse, click Create New Port.

Modify Port Output

In the Block Parameters dialog box, you can:

• Change port and element names.

• Reorder bus elements by dragging and dropping a signal in the list of signals.

• Remove blocks associated with selected elements by clicking the Remove blocks of selected signals button .

Specify a Signal

To change the name of the bus element associated with the block, edit the second text field in the label by clicking the text.

All output signal names associated with the port must be unique. You cannot specify the same output signal name more than once for a port. Simulink^® does not support overlapping writes to the same port.

To create hierarchy in the output bus, use dots in the part of the label that describes the bus element. Each dot indicates a new level of bus hierarchy.

To reduce the size of the label, you can display only the signal name by selecting the block, pausing over the ellipsis, and selecting Compact Notation from the action bar. To show the signal hierarchy again, select Expanded Notation from the action bar.

Log Output Data

When you save output data to the workspace or a file, bus data defined by groups of root-level Out Bus Element blocks are logged along with root-level Outport block data.

Ports

Input

Port_1 — Output bus element

signal

Signal to be included in an output bus that is associated with an external subsystem or model port.

Data Types: single | double | int8 | int16 | int32 | int64 | uint8 | uint16 | uint32 | uint64 | Boolean | fixed point | enumerated | bus

Parameters

Port name — Name of output port

OutBus (default) | port name

Specify a port name that is not already in use by another block or port. The name appears on the parent Subsystem or Model block. The name also appears next to the block. Multiple blocks can access the same port.

Programmatic Use

Block Parameter: PortName

Type: character vector

Values: 'OutBus' | '<port name>'

Default: 'OutBus'

Port number — Position of port on parent block

1 (default) | real integer

Specify the order in which the port that corresponds to the block appears on the parent Subsystem or Model block.

• If you add a block that creates another port, the port number is the next available number.

• Deleting all blocks associated with a port deletes the port. Other ports are renumbered so that they are sequential and do not skip any numbers.

• Specifying a port number that exceeds the number of ports creates a port for that number and for any skipped sequential numbers.

Programmatic Use

Block Parameter: Port

Type: character vector

Values: real integer

Default: '1'

Set color — Specify block background color

Black (default) | White | Red | Green | Blue | ... | ...

Specify the background color for bus element port blocks. This specification sets the color of blocks associated with selected bus elements, or of all blocks associated with the port if you do not select any bus elements.

You can specify Black, White, Red, Green, Blue, Cyan, Magenta, Yellow, Gray, Light Blue, Orange, Dark Green, and More Colors.

Programmatic Use

Block Parameter: BackgroundColor

Type: character vector

Values: 'black' | 'white | 'red' | 'green' | 'blue' | 'cyan' | 'magenta' | 'yellow' | 'gray' | 'lightBlue' | 'orange' | 'darkGreen' | '[r,g,b]' where r, g, and b, are the red, green, blue values of the color in the range 0.0 to 1.0

Default: 'black'

Filter — Filter set of displayed signals

text

Specify a search term to use for filtering a long list of bus elements. Do not enclose the search term in quotation marks. The filter does a partial string search and supports regular expressions. To use a regular expression character as a literal, include an escape character (\). For example, to use a question mark, type sig\?1.

Signal Attributes

To specify signal attributes, click the pencil button or the specified attributes next to a signal name.

Data Type — Data type

Inherit: auto (default) | double | single | int8 | uint8 | int16 | uint16 | int32 | uint32 | int64 | uint64 | fixdt(1,16) | fixdt(1,16,0) | fixdt(1,16,2^0,0) | Enum: <class name> | Bus: <object name> | <data type expression>

Specify the data type. The type can be inherited, specified directly, or expressed as a data type object such as Simulink.NumericType. Do not specify a bus object as the expression.

Dimensions — Signal dimensions

-1 (default) | integer | [integer, integer]

Specify the dimensions of a signal.

-1	The signal can have any dimensions.
N	The signal must be a vector of size N.
[R C]	The signal must be a matrix having R rows and C columns.

Programmatic Use

Block Parameter: PortDimensions

Type: character vector

Values: '-1' | integer | [integer, integer]

Default: '-1'

Dims Mode — Allow variable-size signals

Inherit (default) | Fixed | Variable

Specify the type of signals allowed. To allow variable-size and fixed-size signals, select Inherit. To allow only variable-size signals, select Variable. To not allow variable-size signals, select Fixed.

Dependencies

When the signal is variable-sized, the Dimensions parameter specifies the maximum dimensions of the signal.

Command-Line Information

Parameter: VarSizeSig

Type: character vector

Value: 'Inherit '| 'No' | 'Yes'

Default: 'Inherit'

Unit — Physical unit of the signal

inherit (default) | <Enter unit>

Specify the physical unit of the signal. For a list of supported units, see Allowed Unit Systems.

Programmatic Use

Block Parameter: Unit

Type: character vector

Values: 'inherit' | '<Enter unit>'

Default: 'inherit'

Sample time — Specify sample time

-1 (default) | scalar

Specify the discrete interval between sample time hits or specify another appropriate sample time such as continuous or inherited.

By default, the signal inherits its sample time. To set a different sample time, enter a valid sample time based on the table in Types of Sample Time.

Programmatic Use

Block Parameter: SampleTime

Type: character vector

Values: scalar

Default: '-1'

Complexity — Signal type

auto (default) | real | complex

Specify the numeric type of the signal. To choose the numeric type of the signal, select auto. Otherwise, choose a real or complex signal type.

Programmatic Use

Block Parameter: SignalType

Type: character vector

Values: 'auto' | 'real' | 'complex'

Default: 'auto'

Minimum — Minimum value

[] (default) | scalar

Lower value of the range that Simulink checks.

This number must be a finite real double scalar value.

Simulink software uses this value to perform:

• Simulation range checking (see Specify Signal Ranges).

• Automatic scaling of fixed-point data types.

• Optimization of the code that you generate from the model. This optimization can remove algorithmic code and affect the results of some simulation modes such as SIL or external mode. For more information, see Optimize using the specified minimum and maximum values (Embedded Coder).

Programmatic Use

Block Parameter: OutMin

Type: character vector

Values: '[ ]'| scalar

Default: '[ ]'

Maximum — Maximum value

[] (default) | scalar

Upper value of the range that Simulink checks.

This number must be a finite real double scalar value.

Simulink software uses this value to perform:

• Simulation range checking (see Specify Signal Ranges).

• Automatic scaling of fixed-point data types.

• Optimization of the code that you generate from the model. This optimization can remove algorithmic code and affect the results of some simulation modes such as SIL or external mode. For more information, see Optimize using the specified minimum and maximum values (Embedded Coder).

Programmatic Use

Block Parameter: OutMax

Type: character vector

Values: '[ ]'| scalar

Default: '[ ]'

Model Examples

Connect Multiple Output Signals to a Port

Combine the output signals of a subsystem or model into a virtual bus using Out Bus Element blocks.

Open Model

Simplify Bus Interfaces in Subsystems

Convert an interface that uses Inport, Bus Selector, Bus Creator, and Outport blocks to use In Bus Element and Out Bus Element blocks.

Open Model

Combine Multiple Subsystem Ports into One Port

Three ways to simplify a subsystem interface by converting multiple ports and their connected signals into one port and a bus.

Open Model

Block Characteristics

Data Types	Boolean | bus | double | enumerated | fixed point | integer | single | string
Direct Feedthrough	no
Multidimensional Signals	yes
Variable-Size Signals	yes
Zero-Crossing Detection	no

Extended Capabilities

C/C++ Code Generation
Generate C and C++ code using Simulink® Coder™.

HDL Code Generation

Generate Verilog and VHDL code for FPGA and ASIC designs using HDL Coder™.

This block can be used to simplify the Subsystem bus interfaces when you use the block in subsystems that generate HDL code, but is not included in the hardware implementation.

To learn more about using buses for HDL code generation, see Buses (HDL Coder) and Use Bus Signals to Improve Readability of Model and Generate HDL Code (HDL Coder).

Fixed-Point Conversion
Design and simulate fixed-point systems using Fixed-Point Designer™.