error in HDL code generation?

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Mudasir Ahmed
Mudasir Ahmed on 13 Jan 2016
Answered: Tim McBrayer on 13 Jan 2016
hi
i want to convert my simulink file into HDL code for FPGA using HDL coder in matlab, the main error occurs at 'clock' block in simulink file and error is "Cannot find the implementation for block 'fpga/leg1/Clock1', i think there is no any equivalent HDL code for that block. i have no any alternative for that block in my mind to replace this with another logic. the whole section behaves like a reference signal (degree or timing). 50HZ (0.02ms) signal is generated and below conditions are checked for various comparisons. i have to make the wave form like shown in attached picture. i want to built three phase 7 level inverter. for that i used 36 switches(12,12,12) per phase. i have uploaded three files in zipfolder. one is waveform, second is simulink code without resistors and transistors because for HDL code, i remove all hardware related devices from the file, third is simulink code with complete circuit which work fine and gives desired response like in attached picture. kindly help me what should i do , i will be highly thankful to you
with best regards mudasir ahmed

Answers (1)

Tim McBrayer
Tim McBrayer on 13 Jan 2016
As you are discovering, HDL Coder is not a low-level schematic capture tool; nor does it generate HDL for analog designs.
If you need to generate a signal that is a signed integer, where the values take on discrete values at a certain point in time, you can use Stateflow to build a state machine with the desired behavior. But, I suspect that this may not be what you are looking for as your end result.

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