HDL coder Black box replacement for MAtlab code

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I am using HDL coder to generate Verilog from a function (.m). I have a line of code wich assigns a result to an array. I would like HDL coder to automatically replace this line with an instantiation of a black box during its synthesis of the Verilog. Is this possible and How
Thanks

Answers (1)

Tim McBrayer
Tim McBrayer on 18 Oct 2016
You will need to replace your assignment with a System object inherited from hdl.BlackBox, and place the correct assignment behavior inside the System object. Search the documentation for "hdl.BlackBox" for more details.

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