Signal Integrity Toolbox


Signal Integrity Toolbox

Simulate and analyze high-speed serial and parallel links

Serial Link Analysis

Use the Serial Link Designer app for end-to-end, pre-layout analysis of multi-gigabit serial links. Use IBIS-AMI models, PCB traces, vias, and connectors to analyze loss, reflections, crosstalk, and more.

Parallel Link Analysis

Use the Parallel Link Designer app to determine setup and hold timing as well as voltage margins for high-speed parallel links. Analyze parallel interfaces for compliance with timing and signal integrity constraints.

Standards Compliance

Check serial and parallel links for compliance with industry standards by using one of over 40 available compliance kits for PCIe, DDR, USB, Ethernet, and other standards.

Design Space Exploration

Perform design of experiments by sweeping parameters and channels. Use Parallel Computing Toolbox™ to speed up large-scale analyses.

IBIS-AMI Models for Simulations

Simplify your workflow by using the Signal Integrity Link to build and import IBIS-AMI models directly from SerDes Toolbox™. Or, use IBIS-AMI models provided by third-party IC companies to analyze serial and parallel link performance.

Post-Layout Verification

With RF PCB Toolbox™, create workflows to import PCB schematics for post-layout signal integrity verification.

Waveform Visualization

Use the Signal Integrity Viewer app to create waveforms and comparison plots from S-parameters and HSPICE models.