gm_interface_model.slx file throws unexpected error when it is run by clicking Monitor and Tune button.

Using HDL workflow advisor, I generate gm_interface_model.slx file, but when I run, it throws following error.

External mode is terminating because Simulink received an unexpected incoming packet from target.

I using Xilinx Ultrascale MPSoC Board for implementing my algorithm on FPGA. My sample time of the interface model in 5e-3s.

What can be the cause of this error? Is something wrong with clocking my IP core?

Answer 1

[Gowthami]

Hello,

It is my understanding that you are getting the error while running the'gm_interface_model.slx'model.

I would recommend you go through the solution provided in the following Matlab Answer -

https://in.mathworks.com/matlabcentral/answers/587705-external-mode-sample-rate-limitations-on-zynq-platform

[adeeljsid]

No, I am getting this error while running the gm_interface_model.slx file.

[Gowthami]

Hello,

In order to further investigate issue, kindly provide me the 'gm_interface_model.slx' model and any specific reproduction steps to reproduce the issue at my end.

[adeeljsid]

Files are attached. You need to run the script first and then run the gm_model file.

[adeeljsid]

Any update?? I am waiting for the answer.

[Gowthami]

Hello,

I would recommend you go through the solution provided in the following Matlab Answer -

https://in.mathworks.com/matlabcentral/answers/587705-external-mode-sample-rate-limitations-on-zynq-platform

The above answer is explaining the issue when running the generated model.

While using External mode, you could use the new FPGA prototyping API from MATLAB, if your use case is to read/write data from FPGA.

For more information on Prototype FPGA Design on Hardware with Live Data by Using MATLAB Commands, you may go through the following link - https://www.mathworks.com/help/hdlcoder/ug/prototype-fpga-design-on-hardware-by-using-MATLAB-commands.html