HDL Workflow Advisor Configuration Issues for PWM Generation on Speedgoat IO334-21

I have a toy model of PWM generation on Speedgoat P3 (IO334-21) using blocks from Speedgoat Motion Control HDL I/O Blockset library.The model is based on pwm_example_hdlc.slx. However, I am using only one instance of PWM Generation (CPU) and Abstraction PWM Generation Block (FPGA), which is in "FPGA" subsystem (green block).

I started from blank model, added Real-Time app into the model and selected appropriate Target platform. If I run HDL advisor on green block FPGA, step 1 is OK.

Step "2.1 Check Model Settings" of HDL Workflow advisor fails, due to "Incorrect model configuration settings for HDL code generation. To fix the problem, click the Modify All button, or click the hyperlink to launch the Configuration Parameter(s) dialog and manually apply the recommended setting."

The HDL advisor suggests 3 changes:

• to change System Target File from speedgoat.tlc to grt.tlc,
• to change Device type from Intel->x86-64 (Linux 64) to ASIC/FPGA->ASIC/FPGA
• to change Default parameter behaviour from Tunable to Inlined.

Why does the HDL coder want to change those settings?

(I have run into similar issues on some other examples as well, so the issue may not be specifically related to Motion Control blockset)

Answer 1

[Dimitri MANKOV]

Hi Klemen,

I see where the confusion might be coming from. Before running the HDL Workflow Advisor, I understand that you clicked on the “Simulink Real-Time” button in the APPS tab in Simulink. This changed the model settings to prepare it for C++ code generation for Simulink Real-Time. However, this is not what you need at this stage of the workflow. Indeed, this configuration is only required in the model generated in Step 5 of the HDL Workflow Advisor (which is the model you will be deploying to your Speedgoat target machine), but not in the source model in which you designed your FPGA logic. This source model should not be configured for Simulink Real-Time yet, and the model settings recommended by the HDL Workflow Advisor are correct.

I hope this is helpful!

Dimitri

[Klemen D]

That was exactly the confusion here. I was not aware that “Simulink Real-Time” shouldn’t be invoked before the HDL workflow. I followed your guidelines and successfully synthetized bitstream.