I've been working through this WLAN Beacon Receiver model and I've generated the bitstream and detected beacons using the retargeted model. Now I'm looking at trying to edit the model a little bit to show the power of the beacon signals as they come in. I am trying to do so on the FPGA and therefore within the HDLRx subsystem before generating a new bitstream and uploading it. This much I can do without any errors.
What I don't understand is how the retargeted model knows about the HDLRx subsystem; its location and in/out ports.
According to the tutorial, the retargeted model can be produced by simply deleting the HDLRx subsystem from the original targeting model, but how then do I tell it about the new outport that I want to add to the subsystem?
I attach some screenshots to help explain what I mean.
Without knowing how to instruct the retargeted model of the inputs and outputs of the HDLRx Subsystem, how does one direct newly added outputs of the subsystem? (as seen in the second screenshot attached.)
Any help would be greatly appreciated.