Any limitation to FFT calculation for large sampled signals

Hi,

I'm finding FFT of signal .

Sampling frequency is 1KHz and sampling freq is 50MHz

Number of samples =fs/f=50000.

For these many samples is it possible to find FFT?

Or any limitations?

Thank you

Answer 1

[Walter Roberson]

Example below with 5e7 (50,000,000) points -- 1000 times more than you were asking for. The number you are asking for is no problem at all.

data = rand(1,5e7) - 0.5;
f = fft(data);
plot(abs(f))

[632541]

Thanks Walter Roberson...

Can this be done in real time processing as this has to be implemented ?

Any inputs for this?

[Walter Roberson]

That depends on what you mean by "real time". If you are wanting to generate for a Real Time Operating System on a system that has a floating point chip in it, then see Simulink Real Time, or Simulink Real Time Desktop.

If you mean that you want to generate for a DSP that has a floating point chip in it, then the easiest approach is usually to use Simulink and appropriate Support Package, and change the target hardware so it generates the appropriate image.

If you mean that you want to generate HDL for an FPGA, and you can afford the space for a floating point core, then use Fixed Point Toolbox and HDL Coder.

If you mean that you want to generate HDL for an FPGA, but you cannot afford the space for a floating point core, then again see Fixed Point Toolbox and HDL Coder, but this time generating with Fixed Point objects to remove the need for a floating point core.

If you mean that you want to generate HDL for an FPGA, and you need it to be as fast as possible, then you will want to use CORDIC or similar algorithms to reduce the work even further. See the recent discussions at https://www.mathworks.com/matlabcentral/answers/803176-how-to-create-trignometric-function-lookup-table and https://www.mathworks.com/matlabcentral/answers/803176-how-to-create-trignometric-function-lookup-table?s_tid=srchtitle

[632541]

Thanks Walter Roberson

You mean it depends on the tool I use to find the FFT?

As per my knowledge, the implementation would be on either DSP or FPGA.

If any restrictions are there , those will be on memory (space) constraints ?

[Walter Roberson]

FPGA get more expensive rapidly as the amount of memory increases. The amount of memory required for a full double precision floating point core is pretty high, which makes it quite expensive to use double precision on FPGA. Even using only single precision helps noticably, and using fixed point can make a big difference in memory usage.

DSPs vary as to whether they have floating point at all, with some being integer only, some being single precision, and some being double precision. The amount of available memory with a DSP can often be higher, as some of them can use add-on memory... but add-on memory is typically slower than on-chip memory. DSP speeds vary a fair bit.

If you want the highest performance short of burning your own chip, then you would typically need to use a FPGA with a lot of attention paid to reducing the computational load.

https://www.ieee.li/pdf/viewgraphs/mapping_dsp_algorithms_into_fpgas.pdf

[632541]

Thanks for the sources...