Zhengchen Guo
Followers: 0 Following: 0
Statistics
2 Questions
0 Answers
RANK
195,252
of 297,046
REPUTATION
0
CONTRIBUTIONS
2 Questions
0 Answers
ANSWER ACCEPTANCE
50.0%
VOTES RECEIVED
0
RANK
of 20,422
REPUTATION
N/A
AVERAGE RATING
0.00
CONTRIBUTIONS
0 Files
DOWNLOADS
0
ALL TIME DOWNLOADS
0
RANK
of 157,776
CONTRIBUTIONS
0 Problems
0 Solutions
SCORE
0
NUMBER OF BADGES
0
CONTRIBUTIONS
0 Posts
CONTRIBUTIONS
0 Public Channels
AVERAGE RATING
CONTRIBUTIONS
0 Highlights
AVERAGE NO. OF LIKES
Accept 1 answer given by other contributors
Awarded to Zhengchen Guo on 25 Mar 2024
Feeds
Question
Is there anyway to test custom IP cores on MATLAB/SIMULINK
Hi, I want to test my own IP core with MATLAB/SIMULINK. And I tried all ways of HDL tools but all encountered problems. In FPG...
12 months ago | 1 answer | 0
1
answerQuestion
Results in FPGA-in-loop is different from Vivado simulation and how to debug
Hi there, I'm newbee for FIL. Now I'm test some simple designs, like an adder. The adder code is very simple and works well i...
12 months ago | 1 answer | 0
1
answer
You can also select a web site from the following list
Americas
- América Latina (Español)
- Canada (English)
- United States (English)
Europe
- Belgium (English)
- Denmark (English)
- Deutschland (Deutsch)
- España (Español)
- Finland (English)
- France (Français)
- Ireland (English)
- Italia (Italiano)
- Luxembourg (English)
- Netherlands (English)
- Norway (English)
- Österreich (Deutsch)
- Portugal (English)
- Sweden (English)
- Switzerland
- United Kingdom(English)
Asia Pacific
- Australia (English)
- India (English)
- New Zealand (English)
- 中国
- 日本Japanese (日本語)
- 한국Korean (한국어)