JOAQUIN GARCIA ORDOÑEZ
Processor and FPGA Synchronization in Coprocessing Mode
Hello everyone. I'm following this documentation to run an experiment that is hardware-in-the-loop: https://mathworks.com/help/...
5 months ago | 1 answer | 0
HDL Coder won't map LUT into BRAM
Hello everyone. I am trying to implement a machine learning algorithm into an FPGA using HDL Coder. I was recommended to use LU...
11 months ago | 1 answer | 0
How can I modify mapping options in HDL Workflow Advisor in Simulink?
Hi everyone. I am trying to implement a design on a FPGA using Simulink's HDL Workflow Advisor. The block that I am trying to i...
1 year ago | 1 answer | 0