photo

soukaina


Last seen: 1 year ago |  Active since 2023

Followers: 0   Following: 0

Statistics

Feeds

View by

Question


scalarize vector ports in generation vhdl code with hdl coder
I try to implement median filter in FPGA with matlab, but in the step ''verify with cosimulation" i got that error "vector port ...

1 year ago | 1 answer | 0

1

answer

Question


implementation of median filtre on FPGA ?
Hi everyone, I want to design the median filter on FPGA. I got the output for median filter in matlab and also in matlab simulin...

1 year ago | 1 answer | 0

1

answer