Statistics
RANK
102,669
of 301,628
REPUTATION
0
CONTRIBUTIONS
2 Questions
1 Answer
ANSWER ACCEPTANCE
0.0%
VOTES RECEIVED
0
RANK
of 21,366
REPUTATION
N/A
AVERAGE RATING
0.00
CONTRIBUTIONS
0 Files
DOWNLOADS
0
ALL TIME DOWNLOADS
0
RANK
of 175,858
CONTRIBUTIONS
0 Problems
0 Solutions
SCORE
0
NUMBER OF BADGES
0
CONTRIBUTIONS
0 Posts
CONTRIBUTIONS
0 Public Channels
AVERAGE RATING
CONTRIBUTIONS
0 Discussions
AVERAGE NO. OF LIKES
Feeds
Question
Conv1 layer stalls in ZCU111 MathWorks DLHDL design
Hello, I am working on a custom Resnet18 CNN classifier reference design with a Xilinx ZCU111 RFSoC board using the MathWorks...
8 days ago | 0 answers | 0
0
answersDeep Learning HDL Workflow “Data size mismatch” after deployment – Possible device tree / AXI DMA configuration issue (ZCU111)
Hi, Thank you for the detailed explanation regarding possible causes of the “Data Mismatch” issue. I reviewed my design careful...
25 days ago | 0
Question
Deep Learning HDL Workflow “Data size mismatch” after deployment – Possible device tree / AXI DMA configuration issue (ZCU111)
Hello, I am working with Deep Learning HDL Toolbox on a custom reference design with the Xilinx ZCU111 RFSoC board. I am abl...
1 month ago | 2 answers | 0