Design and Analysis of Industry Standard High-Speed Serial Links - MATLAB
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    Design and Analysis of Industry Standard High-Speed Serial Links

    From the series: MathWorks Wireless Series: Transforming the Next Generation of Wireless Communication

    Overview

    In today's high-speed communication systems, analyzing the specific properties of the high-speed links is quite challenging.

    In this talk, you will learn how to analyze and apply techniques for high-speed serial links using Signal Integrity Toolbox. You can predict operating margins and link performance by analyzing transmitter, receiver, and channel interactions.

    Also, you will learn how to integrate existing SerDes interfaces and minimize signal integrity issues. You can analyze the performance of high-speed serial and parallel links such as Ethernet, PCIe, USB, DDR, when connected to different channels.

    Highlights

    • Channel analysis performed in the time and frequency domains.
    • Design and verification of high-speed links using IBIS-AMI models generated with SerDes Toolbox.
    • Automation and management of large sets of models, testcases, simulation results enabling design space exploration.
    • Post-layout channel models extracted with RF PCB Toolbox.
    • Perform root-cause analysis of signal integrity issues caused by the PCB on the high-speed link performance.

    About the Presenter

    Jahnavi Dhulipala is an Application Engineer at MathWorks, India specializing on Mixed Signal, Serdes and Signal Integrity designs. She works closely with customers across domains to help them adopt MATLAB® and Simulink®  in their workflows. Prior to joining MathWorks, she worked for ISRO as a Research Fellow designing and implementing RF transceivers. She is currently pursuing her doctoral research in Information and Communication engineering and holds a master’s degree in Applied Electronics from Anna University.

    Recorded: 29 Jun 2022

    Good morning to all and welcome to the MathWorks Wireless Webinar Series. I am Prashant, part of the marketing team at MathWorks and will be your host for today. Chair of speakers for today. Our first speaker is Mr. Samaksh Sinha. Samaksh currently heads industry marketing for the awsome region at MathWorks and comes with 15 plus years of experience in technology and semiconductor development.

    Prior to MathWorks, he has held various leadership and operational roles in companies like SD Micro, Freescale Semiconductors and Infineon Technologies.

    Our second speaker is Jahnavi Dhulipala. Jahnavi is an application engineer at MathWorks, specializing on mixed signal service and signal integrity designs. Prior to joining MathWorks, she has worked for ISRO as a research fellow, designing and implementing RF receivers I will now hand it over to Samaksh and will meet you during the end of the session. Thank you.

    Good morning, everyone. Prashant, thank you for the introduction. I'll just get started right away. For those of you from the semiconductor industry, the picture on the right would look somewhat familiar and also somewhat scary because this is a typical TXRX, which is a whole host of IPs thrown in there. And depending on which part of the industry you come from, either semiconductor auto, or further downstream, this either makes sense or doesn't make sense, but you do recognize that's being extremely critical in functioning because semiconductor is let's say, the building blocks that we have.

    Now what is the challenge for this particular automotive radar I see? We have been talking about radars for long a number of years. So what's particularly special about this? Well, let's find out.

    Typically, when we talk about ICs we are talking about back in the day, we were talking about simple digital blocks and some of the analog topics. However now, as we proceed further, we are talking about things like on road view. We are talking about verification. We are talking about lower miniaturization. We are talking about how these ICs further integrate with the software to provide a better system value.

    And most critical the point mentioned here is that when this automotive IC was being thought of with the likes of Bosch and NXP and then NXP was kind enough to share this with us-- one of the key concern was that there are certain road scenarios which will become very dangerous to be field tested during the trials. Now think about somebody who's designing a PLL. He is so far removed from this problem that he doesn't even think about this.

    He has nothing to do with what a road scenario might look like. And this is the key challenge. There are people who are, of course, great experts in their field, but that's the limited view. And this is one of the problems plaguing the electronics and the software industry, which we will then talk about this a little more today. So Prashant did date me a little bit. He said 15 years. I have a little bit more experience than that.

    And when I started my career in semiconductors, I used to design something at 350 nanometers. And for those of you keeping abreast, today, Intel and Samsung are trying to fight for 3 nanometers. So you can imagine what has happened is back in the day, when we were thinking about increasing performance, we were talking about doing better processors from 350 nanometers, came 250 nanometers, 250 became 180, 130, and 90 nanometers was my first sub-hundred nanometer design. It was called Submicron Design.

    And that's how we were bringing out more and more performance out of these systems and solutions. Fast forward to 2022, we are now in a situation where processors are 3 nanometers. Anything lower, one looks impossible or looks ridiculously expensive to do. Most of the circuit topologies have been thought through the differential and the last vestige and even the circuits are not behaving as they're supposed to behave. A transistor is no longer a switch. It's more like a lossy resistor.

    So where do we get our performance out of this? So this is where we have to go to a higher level of abstraction, which is looking at systems and looking at solutions. Now, while I was researching for this particular talk, I happened to come across Infineon. This is a slide from the Infineon slide deck. And Infineon recognized this shift. So as you can see on the left, they used to call themselves as a technology provider. As they moved on, so when they came to the 2010's, they started becoming a system integrator.

    With some mergers and acquisitions, they then became a system provider. And today, Infineon prides itself as calling themselves a solution provider. The recently retired CEO of Infineon, Dr. Ploss, talks about something called P2S, a product to system approach. So even semiconductor manufacturers have started looking at themselves like solution providers.

    So back to the automotive radar IC. So when NXP was thinking about this, they could have done all this runs to level design and thought of this and try to put things together, or they did what's shown here on the left. They not only did one model, there are three different models. And for those of you from the automotive background and have a keen sense, you can see that this resembles something which is very familiar to you. The V, the very famous V-model.

    So here on the left, they did a statistical sensor model. Now the statistical sensor model on the left hand side would also been capturing some of the requirements, while on the right hand side of the V, we also talk about certain level of validation. Yes, it has very low fidelity But, for architectural exploration, this is the right model to go off. Well, when we go to one next level of fidelity, you're talking about a radar DSP model.

    This is where some system level specifications come into play. And then we talk about how does it integrate? So on the right hand side, you have the integration testing. This model is somewhat in between fidelity and quick turnaround time. Finally, when it comes to circuit level, on the left hand side, you see sub-circuit specification. And this is where the system analog DPI-C model really comes into play.

    And while they're doing system levels-- so somebody has an idea of what the top requirements might look like and then it's broken down to subsystem specifications and they also need to be both verified and validated before the whole thing folds back into itself to complete the entire way. So as you can see here, from an architectural exploration which could have gone any which way-- and we'll talk about that briefly-- they chose to sit on the V model and leverage the models there.

    This, I think, is a good foray into a little bit about myself also. Prashant talked about it. And so I'm responsible for ASEAN industry manager. I look at the communication, electronics and semiconductors aspect of the business. I'm based on Singapore and have some sense of what analog and mix signal looks like. I've been doing this for a few years before I joined MathWorks. Now let's talk a little bit about why this shift left, why the theme that I'm talking about.

    On the left hand side, I talked about trends and challenges. And you can see-- and this is probably a pain point, both for semiconductor folks, as well as auto folks or even other people in the industry-- that most of the failures, they are actually happening in the analog side. And the reason for that is this, that people cannot really capture and lock in a black and white in a truth table format.

    It's a continuous time spectrum and that leads to a lot of issues. And all the stress tests cannot be performed in analog. Two-thirds is because of coverage and one-third is because of reliability. So where do you test all these things? And this is where we talk about shift left verification. Where we say that the errors that are found finally towards, which lead to either in production or final prototype, why not try to shift those to the left? Why not bring the verification methodology to the left?

    And we will talk a little bit about that, how we can do that with MathWorks. This is an interesting slide. It's a bit crowded. I will take a minute to talk through this. We are talking about errors that have been introduced. So here, you can see that some error that has been introduced in the coding phase can best be fixed, either in the coding phase, or the next best solution is to fix in the testing phase. However, an error which comes up in a design phase, again, best to be fixed in design phase through continuous verification or decoding phase. And for those of you with a keen eye, you'll see the bars are getting taller. So if you fix it in the testing phase, the relative cost of fixing this error definitely goes higher. And this is a true killer. An error, which is done in the requirement phase. So if you think about the V, right on the top left of the V, an error introduced there and not fixed in the subsequent two stages will just accumulate exponentially and cost you a lot in the final testing phase. And this is too late. Frankly, this is too late. This cost not only time, resources, but also time to market.

    So having said that, let's also look at time in terms of verification. So here's the interesting graph in terms of the time spent on the design side versus time spent on the verification side. So as you can see that there is a trend where about 50 plus percent of the effort is being spent on the verification side and not so much on the design side.

    A different view of looking at something similar is, again, on the design project, as you can see as we move through the years, the effort on verification is going on increasing. It's above 50% all the time, while design actually is taking less than 50%. So half of the effort of the entire team is going into verification.

    And this brings us to another problem, which I believe is an acute problem this day in the world. It's about the engineers, the peak engineers required. So while you can see that from 2016, it's somewhat flattened or even on the lower side for the design engineers, the requirement for verification engineers goes on increasing with time. And this only gets exacerbated. It is our view that it will get even further worse.

    So what does this all mean? So there are three major barriers to successful system design in our view. For the semiconductor folks, it's not just analog and digital. And then folks who are further upstream could think about how to integrate software, hardware, RF, analog and digital. This of course, comes with verification bottlenecks. And one of the traditional way of doing engineering was a transistor level mindset, where I do a bottom up approach. However, as we are transitioning, we are now looking more of a top down approach.

    And then, what does MathWorks think about this? How do we tackle all these issues? So one way to do it is we think of a multidisciplinary development environment. What does that mean? Well, I will come to it shortly. We also believe in continuous verification. It's a popular jargon in the software world, CI-CD, continuous integration, continuous development, but we also talk about continuous verification. And also we want to integrate strongly with other standard EDA vendors that are available.

    So in case of if you're analog designer, MathWorks integrates very well with cadence. And then there are a whole host of other-- not just electronics, but even mechanical designs where MathWorks integrates very well. And this is a small and somewhat of a favorite Ken Kundert quote. And I have highlighted some of the things in bold which talks about the models and being early in the design process and, somehow, doing a level of parallelization which he talks about, start at the same time when the block design begins.

    Now if you think of a traditional approach where we do everything serially, this is just not feasible. So here's another example, if you're not just with an NXP, here's the example with Allegro where they put together their algorithm design, how we call it, they front-loaded the testing and verification. So where we introduce the concept of parallelization and the continuous equivalency check.

    What does that mean? If we go to the next slide and if I may bring your attention to the right, there is a traditional design approach where there is a waterfall from requirements, to design, to implementation, to integration.

    However, when we do a model based design approach, we talk about continuous equivalency check so while you're doing a design, you can do an equivalency check with the requirements. If there is a change in requirement, you can integrate that in your design and then continue this loop in between the requirements, the design, the implementation, and what's been implemented, can it be then re-checked with the requirements?

    And this is not only for electronics, I would also like to share with you that with a multibody simulation, at MathWorks, you can include fluid dynamics. You can include control systems. So you can do a whole host of things while you're doing this.

    Doing all this, you can, at the end, also do code generation with the tools from MathWorks provides. So being aware of the time, I come back to the final slide where I started from where NXP partnered with us. In this model, they use the model based design approach, which helped them shift left and achieve them a quick tape-out with very low bugs.

    And it's not just NXP, There is Allegro who also use our model based design approach with a shift left thought process and came up with precision automotive magnetic sensor, which was then further integrated into an automotive system.

    And it's not just NXP and Allegro. I believe a lot of you come from these various companies listed here, and all of these companies have worked with us specifically for electronic design and verification, workflows to be quick time to market and also to reduce their bugs. So in summary, we are very happy to present to you this model based design approach, which enables you to shift left.

    And we are very happy to partner with you and we can then also request our colleagues to take up if there is specific questions. Thank you. That's all from my side.

    Hi, everyone. Thanks for joining this webinar. So welcome to this presentation. And in this presentation I'll tell users about the signal integrity analysis and the adjacent workflows with MATLAB. So as Prashant gave an introduction about myself, let me talk about me. I'm Jahnavi Dhulipala. I'm an application engineer. My area of focus is mainly on analog and mixed signal service and signal integrity.

    So with that, let's get started with the session. Today, we will be first introducing about the typical signal integrated workflows. And the main module of this presentation is to introduce our two newly released toolboxes. The signal Integrity Toolbox and the RF PCB Toolbox.

    We'll be talking about using signal Integrity Toolbox for the channel design. And we'll be using a RF PCB Toolbox, along with the signal Integrity Toolbox for the post layout modifications. And finally, we'll leave some time for the conclusions and the question and answers. So what's new for the signal integrity and the PCB analysis? Let's start by setting the stage.

    This presentation mainly focuses on design and modification of a wireline communications. So in particular, high speed digital input analysis. So those systems are composed of a transmitter, a receiver and the channel in between through a channel. So the transmitter that gets distorted by the channel-- that could be a cable, or it could be open a PCB or a backplane-- definitely it leads to some sort of a cross stops with adjacent channels, or it leads to the noises and some sort of a loss or dispersion that happens in the channel.

    So the transmitter and the receiver, which was implemented, that implemented along with the equalization algorithms to recover correctly the transmitter bits. So a few years ago, MathWorks launched the service Toolbox for the design of the equalization algorithms in wireline transistors. So as a logical addition to it, in the latest , we came up with two toolboxes. One is the signal Integrity Toolbox and the other PCB Toolbox.

    So in the rest of this presentation, we'll be mainly focusing on these two products. So signal Integrity Toolbox, which could be used for the pre-layout analysis signal integrity and RF PCB Toolbox, which could be used for the post-layout analysis. So if you are a user of SiSoft in your earlier designs then this could be of very much interest to you. So the SiSoft has been transitioned and right now, the MathWorks has bought the SiSoft products.

    And right now, this is called as a signal integrated toolbox, there's two main products. And we come up with the RF PCB Toolbox. So the signal Integrity Toolbox will cover both serial and parallel link analysis, but it is only for the pre-layout analysis. You can do the design of experiments. You can actually set up different certain parameters. You can see a large solution space. And other PCB Toolbox with signal integrated Toolbox will cover you the post-layout analysis for serial and parallels.

    So along with that, we have those parallel computing toolboxes and the MATLAB problem solver toolboxes for the simulation to get faster. So now, coming back to the discussions about the SerDes and the Signal Integrity Design and Verification Workflow. So how does MathWorks look from the signal integrity and service point of view? How it will be helping the different engineers who are working with this [AUDIO OUT].

    So talking about the different roles of the engineers involved in the design and verification of the high speed input and output, the third is architects who work in designing the equalization algorithms. And there are IC designers who actually implement the ICs and then they go with the signal integrity engineers. Who are the persons who create, assemble, validate and model the high speed input and output.

    Also, we'll be having some IBIS-AMI models who provide the models of the SerDes system to the signal integrity engineers. And there will be PCB designers as well as the layout designers who provide the PCB databases to the signal integrity engineers. So for all the different roles of engineers, we have our signal Integrity Toolbox, as well, as a SerDes Toolbox, which could help you to create or provide the equalization algorithms.

    Along with that, you can perform the channel analysis and everything using the SID. So now, this is all about a basic interaction about how does MathWorks approach this situation? Now let's directly get into the signal Integrity Toolbox, how we perform the signal integrity analysis. So here, we are going to talk about the different features which is available in the SI Toolbox.

    What is this SI Toolbox? The signal Integrity Toolbox is all about the design and analysis of the serial link and the parallel link interfaces. So for example, it would be like for designing the ethernets, it would be designing for PCIE, USB, LPDDR and everything. And here, there are two apps which is available to design your signal integrity models. The serial link Designer app, which could help you to create the serial links like ethernet, PCIE designs.

    And if you are interested in creating the DDR, LPDDR, graphical DDR, you can go with the parallel design. So these are the two apps which is available at the MATLAB environment. And this is how the UI looks like. So with this, after talking about the features of the signal integrated Toolbox, we'll be going with a small demo. And I'll be showing you how this tool looks like. And here, also by talking about the features, you can also perform the channel, the statistical analysis and the time domain analysis.

    And along with that, if you are interested to do some sort of sweeping of your parameters, you can do that as well. And there are also, if you have your own IBIS-AMI models with you, you can import those IBIS-AMI models for testing. And also if you have the PCB files, then we can import that PCB data and we can perform the post layout analysis. Coming back to the next feature. So let's say that if you have a transmitter and a receiver connected to a PCB, which is not yet being designed, then you can actually rapidly verify what are the margins or traces or wires to be designed?

    So this signal Integrity Toolbox has a Via Editor, a transmission line Editor, a startup Editor where you can create the Vias and you can do the editing of your Vias inside this Toolbox. So with the signal Integrity Toolbox, you can incorporate a PCB setup using the quasi-static 2D method. And you can analyze the Vias and the traces. With the Via Editor, you can actually finish or you can drill the whole diameters. You can choose the pads and the anti-PID dimensions. You can also determine the single ended and the differential bias.

    You can do the back drilling and you can also define the layout where to place this Vias. So when coming back to the transmission lines. So here, you can design the transmission or you can model the transmission lines in both serial and the parallel link designer. You can choose a single engine or a differential transmission line. You can have a model type like a micros one or a simple lossy line.

    You can design a strip line as well. And coming back to the etch shapes, you can go with a rectangular shape and a trapezoidal shape as well. And here, you can see below, you can find there are different parameters, which is provided. You can do a lot of sweeping of these parameters also. You can provide the values and you can determine those or you can calculate the impedances, the delay per length. You can calculate the resistance the inductance and the capacitance values.

    And what I already have said, like the wires, or the traces, or the transmission lines, everything can be sweeped. So you can actually do the sweeping for all these parameters and you can do the sweeping until you reach the best ones. So this is one sort of feature. And next coming back to the other feature, which we always call that. Often your channel is not just made up of a PC. Additionally, it includes connectors, it includes the cable assemblies and packages.

    You have a set of existing measurements, or you might be having results from the circuit level or EM simulations, the electromagnetic simulations. So in this case, you can import the parameters for the description of these additional channel components. So with the signal integrated toolbox, you can import the input Touchstone files. So the S2P file, or the SNP files. You have the facility to import this S-parameter files. And you can also edit those s-parameter files here.

    You can see there is something called an s-parameter check list. You can click the checklist tab and look into how does the insertion loss looks like, what is the return losses? And all the parameters of the s-parameter can be determined using the signal Integrity Toolbox as well. So you can visualize the results also.

    And coming back to the sweeping of the variables, yes, once you have set up your channel, the transmitter, the receiver, and the channel, you can speed the parameters and you can explore the design space. For example, you can sweep the trace length, the wire models and the s-parameter files. And you can also sweep the IBIS-AMI parameters of your transmitter and the receiver.

    So this allows you to test the service equalization algorithms, whether it is meeting your specifications at the corners. So finally, if the design space is very large, you can catalyze this analysis by making use of a PCV, which I was talking about, PCT, the parallel computing tool box and the MATLAB Parallel also. Now when we talk about the design part and then when we talk about what are the features which is available, and now we come to the analysis.

    So what sort of analysis you can do with the signal Integrity Toolbox? In general, you can perform the channel analysis and you can perform the statistical and the time domain simulation of your interconnect. So what is the difference between, what is the statistical analysis and what is the time domain analysis?

    So in general, the channel analysis is nothing, but it will be talking about the network characterisation which will give you the impulse response, the step responses, the pulse response, s-parameter, transport functions, all those results you can view through the network characterization.

    And what is the statistical analysis? So the statistical analysis is just used for you to determine the statistical eye diagrams. This is actually a linear time invariant. And it is based on convolution. This statistical analysis is very fast. It is used for estimating the very low bit error rates.

    And coming back to the time domain analysis, so the time domain analysis is nothing but it provides you the visualization of persistent eye diagrams. It includes the nonlinearities. The time domain simulation is executed bit by bit and it takes into account the nonlinearity and verify the adaptation of the equalization algorithms. So as a result of all this analysis and simulations, you can verify the transfer function of your channel. It includes the insertion and the return losses. And you can also measure the crosstalk.

    So all this analysis part can be done by making use of the signal Integrity Toolbox. And finally, the signal integrated Toolbox provides you more than 40 built in kits for proving industry standard compiling skills. We have 40 reference compiler kits with us. So you can make use of this as a reference and you can do the changes. You can modify it, you can provide your own parameters and specifications to it and get started with the project.

    So this could be providing you a good start to get started with the signal Integrity Toolbox. And in our chat, you can actually find the link of these compiler kits to get started with the industry standard. It includes about the PCIE for the Ethernet, USB. It also includes, for the DDR and everything.

    This is all about the signal Integrity Toolbox and support. If your focus is on the development of the service algorithms, you have already used the SerDes Toolbox to create the IBIS-AMI models, then it's perfect. You can have this, it will benefit you as we have a bidirectional link between the SerDes Toolbox and the signal integrated Toolbox. You can generate the IBIS-AMI models from the SerDes tool box and from one single click, you can import the signal Integrity Toolbox and you can do the channel analysis.

    This we call that as a regression analysis with various channels. So this work enables a close collaboration between the service Toolbox and the signal Integrity Toolbox. So until now, we have seen the different features. We have seen what you can do with the SI Toolbox. And what are the analysis you can do with it. Now let's see about how and where to start. So there are three different approaches or three different methods to get started with the signal Integrity Toolbox.

    The first method is, as I mentioned earlier, we are having two apps. One is the serial link Designer app and the paralleling Designer app. And I'll be showing you during the demonstration where you can find those apps. And with one single click, you can import the signal Integrity Toolbox and by clicking the auto generate topology you can open the project and you can modify the projects to meet your specifications.

    Going with the second method. So the second method is nothing but loading the design kits. In the previous slide, I mentioned about the 40 compiler kits which we have at our end. You can make use of this already existing project. You can go with changing, or you can modify the compiler kits and you can do the analysis and the verification as the visualization of the waveforms can also be done. So this is the second method of getting it to the single entity Toolbox. And the final one is through the SerDes Toolbox.

    So you can import the SerDes Toolbox. You can generate the IBIS-AMI models from the service Toolbox. You can import that into the single integrated Toolbox with a one single click, which we call that as a signal integrity. So these are the three approaches or the methods to get started. And in this presentation, or in this webinar-- I'm sorry, just a minute.

    Jahnavi, would you want to push the polls after the slide?

    Yes, after this you can push the polls, Prashant, thank you.

    Thank you, Jahnavi.

    Yes, so this out of three methods, you can actually go with this. So this slide we'll talk to you about how do you import the signal Integrity Toolbox from the SerDes Toolbox with one single click, which I was talking about creating the serial link project. And then from here, the automatically the signal Integrity Toolbox inbox and you can do your process. So this is what the demonstration which we are going to see after the slide.

    So now, we'll be going with a demonstration of the signal Integrity Toolbox. So I wanted to show today how to use this signal Integrity Toolbox, the main module is to give you an overview about how the tool looks like. Yes, so going back to the MATLAB environment. So I was talking about importing the signal integrity toolbox in three ways.

    This was a MATLAB environment. In MATLAB environment, you'll be finding this app section. So under the Apps, under the signal processing and communication, you can find the serial link Designer app, as well as the paralleling Designer. So for the serial project, you can make use of this app and you can perform the different high speed models, the industry standard models. And similar with that of the parallel link Designer. And here, there is one more app, which is called a signal integrity viewer.

    This is mainly used for visualizing the results which you have done, the design part, which you have done in the serial and the pattern. So this is the three apps which includes about the signal Integrity Toolbox. But today's presentation is mainly going to be of invoking the signal integrity toolbox from the SerDes toolbox. So here, I have already created a basic design of a PCI design, which includes an FFP at the transmitter end. And a CTLE and a DFE/CDR at the receiver.

    So from this, I can directly generate this IBIS-AMI models and also I can go to this Simulink environment. So this is how the Simulink environment opens when you just export parameter from the SerDes design. So you can see the FFE block at the transmitter end and the CTLE/DFE at the receiver end. So here, I have gone from the configuration block, you will be finding the IBIS-AMI manager, and through which we can generate the IBIS-AMI models for the design you have created using the service system.

    And here, you can see this step. And this is the tab, which was added from 2021 and this is the one which will take you to the signal Integrity Toolbox. Now if you just click this open signal integrity link, you might be finding the window, which talks about whether you are going to start a new serial link project, or you are going to start a parallel link project. From here, what I'm going to do is I have already created the serial link project to just save our time.

    So what you need to do is you need to provide the name and just give one single click by clicking this create serial link project. Once you click this serial link project, automatically, your signal integrity tool box will import. This is how the signal Integrity Toolbox looks like. So this is a serial link Designer app, which has all this UI, it definitely looks like. So let me give you a small tool about the signal Integrity Toolbox.

    So if you see here, this is the schematic sheet. So once if you just import from the SerDes toolbox, automatically this topology gets created in the signal Integrity Toolbox. If you are importing from the app, then you may not be having anything in the schematic sheet. So at that time, you need to go to the File, Project, and New project and you need to do the process.

    And going back to the other tabs here. So if these tabs could provide you to save the design those are the wire options. And here, you can see the simulation, how you can do the simulation after designing the process. So this is all about the tabs, which is available here. And now coming back to this area, this area we call that as a schematic sheet.

    So here, you place the components, which is available from the left hand side, this palette. This palette, which includes about the resistors, the capacitors, the inductors, the transmission lines and also the wires and everything. So if your design is having some sort of a wire, you can actually place that wire here and that wire, you can also do the editing process, as well. So going to this tabs here, under the Libraries option, you can see there are different options which you can do.

    Suppose if you are a circuit level designer, and you say that you have your IBIS already, then you can import that IBIS information into this signal integrity tool box, along with the equalization algorithms, which was brought from the SerDes toolbox, the AMI, and you can perform the channel analysis along with those values as well. And suppose if you say that we are having the s-parameter values like we are having the packages or the connectors, I have the s-parameter data.

    Can I use that in the SI Toolbox? Yes, definitely. Can do that as well. You can import the s-parameter data into this. Once if you just click it, if you have any package, you can actually use that and-- for example, let me just show you how you can actually import that in this design. So here, this talks about how you can import the parameter files into the signal Integrity Toolbox and how you can check the parameter checklist and everything.

    So this was the slides which was a block, or the window I have shown in the presentation just now. So you can actually see the different waveforms of the s-parameters and it also talks about which port is being connected to which port. It also provides you the checklist information and everything. So this is all about how you import the IBIS values, how you import the s-parameters and how you can edit the s-parameter values and everything.

    And coming back to the Tools tab over here. So I was talking about how you can actually go with the editors and everything. So once, if I just click this transmission line Editor, this is how it looks like. So you can actually provide the parameters here. You can calculate it and you can go with a differential, the single ended, and you can change the transmission lines using the Making Use of This Editor. And similarly, you can also go with Via editor. So the via editor looks this way.

    So you can look into this. This is a Via editor. And you can provide what should be your top layer and what should be your bottom layer and how you can do the back drilling. All those processes can be done by making use of this Via Editor. So you can select what should be your top layer, what should be a bottom layer and how you can use this Vias inside your design as well.

    And similarly, there are startup editors. So I'm just giving you a tool of what are the options, which is available in the Signal Integrity Toolboxes. With that, now let's come back a bit down. So here, you can find the solution space. So if you see, this is my designator, the transmitter. And you can see, I have added an FFE at my SerDes level. I have showed you, as well. I have added an FFE to the transmitter.

    So we have invoked the signal Integrity Toolbox directly from the SerDes toolbox. So whatever the parameters, I have given at SerDes end will be carried out here. And when you see the receiver designator, you can find the CTLE and the DFE/CDR. And you can do a lot of sweepings here as well. In general, you can see here what are the values you can actually use for the analysis part.

    So this is the transmitter, and this is the receiver, and this is the channel. And everything you can see in the solution space. And here, you can perform the different sweepings as well. Now what I'm going to do is I'm going to go to the receiver and at the receiver end, I'm going to change only the CTLE configuration. I'm going to set all the values. So by setting all the values, you will be taking all the configuration values so it'll be seen for a configuration select of 0, what will be the output or what sort of analysis or output results you might be getting.

    It will be talking about how our eye height is determined, how your eye width is determined for each and every value you have provided. So if you see here, I have selected all the values and my simulation code has been increased. So now, how to do this after designing everything, after providing the values, after giving everything. Now it's time to do the simulation.

    So you can go to the right and you can validate it and you can go with the simulate selected. This is one way. Or you can also go with this. You can select this. And once if you select, you can actually see what analysis you can do with it. Here, you can actually do the statistical analysis, you can perform the time domain analysis, you can perform the channel analysis, and finally, you can also get those results in the form of a spreadsheet as well.

    I was talking about the parallel computing toolbox. And this is the one which will help you to do the simulation much faster. And if there are around thousands of simulations, this could help you to complete that with a very fast manner. So this is how you can actually select everything and you can go with the Run option. So as a matter of time, I have already ran the simulation.

    And if you see here, this is how-- when you click the Run option, run button, the signal integrity viewer window pop ups. So this is how the signal integrity viewer looks like. And you can see, for all the values, each and every row is a separate simulation. And you might be finding the difference here, you can see the eye height, eye margins, the eye width. All the values for each and every configselect as we determine.

    Along with that, you may also be getting the spreadsheet, which also includes about the values which have been achieved from a result. Now, we'll be going to this end and you can right click on any of the simulation. So I'm going to right click on it and by this manner, you can see what is the eye height, how does your eye looks like. And also you can add here, you can add a new display. And you can go with checking the bit error rate, or you can go with the contours.

    You can show the step response. How the pulse response looks like. So here, for each and every simulation, you can keep on adding the displays and you can see how the wave forms looks like. So this is one thing. And here, you can find some sort of gear thing. Once if you just click this, you can get, once I have a window, and here for example, I say that the eye height here, I'm searching some, but I don't want that. I want that to be at the top.

    So you can actually place that at the top so that it will be coming in the frame, so you can see that results very easy. You can find the eye height and eye width . So these are the options which you can actually do using the Signal Integrity Viewer. Now coming to the plots, you see that, OK, now I have my eye height, I have my eye width, I want to plot eye height versus eye width, can I do that? Yes, definitely you can do that.

    So in the statistical end, you can select everything. So you can go with selection of all those things. And you can right click on it and-- so here, you can actually select this, go to the gear button, and you say my x-axis, for example here, I want to say I want the eye width to be at the x-axis. Let me close this.

    And I'm going to say that, OK, I want my eye height in my y-axis. So you might be finding the results. This is talking about the eye height and this is talking about the eye width. So you can do a lot of plottings. And you can determine the performance of each and every plot, separately. And from here, we already talked about one point that's a bi-directional.

    You got the results, and you say that there need to be some sort of changes which need to be done at my equalization level. Can I do that? Yes, of course you can do that. So how you do that is, here, as we mentioned, we are able to create a serial link project. Similarly, you can also import the serial link project. By this click, once if you just click it, it automatically-- so I'll be refreshing it.

    Yes, so once, if you just click this Import button, it automatically comes back to your SerDes tool box. And inside the SerDes toolbox, you are able to change everything. And again, you can go back to the signal Integrity Toolbox. So on the whole, till now, I have showed you about the pre-layout analysis.

    So this is all about the demonstration I would like to share that with you, giving you an overview or an idea about how the signal integrity tool looks like and how you can perform the pre-layout analysis. As a matter of time, I will just give you an idea about how you perform the post layout analysis, not in much detail, but giving you an idea about how you perform the post layout verification.

    So of course, if you have the PCB databases with you, what you can do is-- so you're speaking about viewing the PCB layouts, you can actually make use of the other PCB Toolbox and the signal Integrity Toolbox. You can import that PCB data into the signal Integrity Toolbox and you can perform the post layout analysis for the typical boards what you have.

    So you can simplify the analysis of this board and you can actually consider a single memory channel or you can perform the analysis using the post layout analysis in the SI toolbox. And how do you do that? So you can import both the PCB databases with the layout.

    And, all different major formats. If you see here, these are the different major formats, which is available. You can use these formats and you can import that using the other PCB toolbox. And inside that SI toolbox-- and you can do the post layout verification for the PCB database which you have added.

    Similarly, after importing, you can connect the boards. We need to extract the nets, So you can do a lot of a process using this at the post payout databases. And you can see it could be around 1177 simulations can be done. So here comes the parallel computing toolbox. It plays a vital role because it is around more than 1,000 simulations. And it will be just taking only two hours for you to get completed with the post layout verification.

    So this parallel computing and the MATLAB parallel server both helps us to run the simulations at a very faster rate using the HSPICE and running the simulation and completing it within a very short time. So the main advantage of this post layout analysis is that the speeding up is very, very faster and you can do the post layout analysis at a large extent.

    So using the signal integrity and the other PCB, the post layout analysis, you can do that at a very ease. So finally, you can review the results. From this graph, you can actually find the results-- what was achieved from the post layout analysis. After the simulation we can check the results. So you can determine the timing violations. You can determine the setup at all margins and everything. And also from the post layout, you can also generate the pre-layout topologies coming back. And you can also change some parameters.

    You can parameterized the data. You can explore the spaces. You can modify it and you can do the process. So finally, once the layout is engineered who delivers the updated databases, you can actually verify all the violations. You can do all sort of a verification process and you can lead to a successful design. So here, I would like to share one of the design on paper, which we came up with in 2022. That paper was actually provided as a best paper.

    So this paper presents a study of the interaction between the ground return vias and the signal ended vias. So this is one such paper which was actually done as a best paper, which was designed using data, Signal Integrated toolbox, and the RF PCB toolboxes and the SerDes toolboxes. So on the whole, coming at the end of the session, I'm going to summarize saying that these two products were introduced in the 2021 B, the Signal Integrity Toolbox and the RF PCB toolbox.

    And these two are used for extending the workflow of high speed digital interconnects design and verification. So you use SI Toolbox for the pre-layout analysis and we need RF PCB toolbox and Signal Integrity toolbox for performing post layout analysis. So with this, I stop here and--

    I just want to let you know that these two toolboxes could help you to get started with the signal integrity analysis. I would like you to just explore it and if you have any sort of issues or questions or anything, we are more welcome to answer all your questions.