Can HDL coder produce code for unit delay with initial condition input

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I was trying to make register that would load initial values, for first sample time and then change them in each sample. I made unit delay with initial condition via port, but now when i try to generate HDL code in Check block compatibility I get the following error:
The initial condition for the Delay block must be specified via Dialog.
Is this block made that HDL can't be generated if I have input for initial condition or I made some mistake?

Answers (1)

Kiran Kintali
Kiran Kintali on 22 Jun 2022
This feature is not currently supported and is on the future HDL Coder roadmap.
For the block 'model/DUTSubsystem/Delay'
The initial condition for the Delay block must be specified via Dialog

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R2018a

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