Remainder of a division operation in System Generator

I have an integrator which gives the running value of angle theta. To find the sine/cosine of this angle using the SysGen ROM block, the value of theta is always required to be within the range 0-360, which can be obtained by finding the remainder of division of theta by 360.

As there is no direct block that gives the remainder after division operation in SysGen blockset, please suggest a way to do this.

Thanks!

Answer 1

[Andy Bartlett]

Consider restructuring your design to work in units of revolutions instead of in degrees. In that case you only need to perform modulo 1 which is nothing more that dropping the bits to the left of the binary-point.

FYI: when modeling with Simulink blocks instead of System Generator Blocks, Fixed-Point Designer's Modulo by Constant block can be used. It is design to give optimal handling of modulo by constants like 360, 2*pi, etc. But modulo of 1 revolution will still lead to the most efficient implementation.

[SUHANYA M S]

Hello Andy,

Is it possible to do a mix of design with System Genrator blocks & HDL Coder blocks in the same simulation file?

Will have to move to Vivado to program the FPGA.

EDIT : Thank you for this link https://in.mathworks.com/help/fixedpoint/ref/modulobyconstanthdloptimized.html

I'm going to give a try with the crude definition of modulus to extract the value of theta, which this block also does.

[SUHANYA M S]

Hello Andy,

The Divide Block of Sysgen is creating a whole bunch of errors, one of which is posted at https://in.mathworks.com/matlabcentral/answers/1900325-error-in-divide-block-system-generator

Please help!

[Andy Bartlett]

Hi Suhanya,

As I noted in the your other posting.

Please reach out to the tech support team from AMD (Xilinix) for their System Generator product.

I'd like to be more helpful, but the details are specific to these AMD blocks and will require the AMD tech support or development team to explain.

Regards

Andy

[SUHANYA M S]

WIll do that. Thanks!

Answer 2

[Bharath Venkataraman]

When you say "running value", what is the range of the update value? If the initial value can be set to the proper range of 0 to 360 and the update value is limited such that the accumulated value will be less than 720 degreees, you may be able to use an adder to add the value followed by a subtractor of added value-360. Then you can choose between those values to stay between 0 and 360 all the time.

So if you current value is 300 and you add in 75 degrees, you will end up with 375 out of the adder and 15 out of the subtractor. Seeing that 15 is a positive value (or knowing that 375 is greater than 360), you pick the subtractor output. Otherwise, you would pick the adder output. Whichever value you pick needs to be the next value used for the accumulation.

[SUHANYA M S]

I'm sorry I didn't get why an adder AND a subtractor are needed. The value is not restricted to a range for now. The output of the integrator is 32-bit and full precision.

[SUHANYA M S]

Please explain how the adder-subtractor can help in my case. Thanks!

[Bharath Venkataraman]

For your case where the value range is not restricted, the above option I proposed will not help. You can try Andy's approach using the Modulo block in Fixed-Point Designer.

For Sysgen specific approaches, I suggest reaching out to Xilinx support.

[SUHANYA M S]

WIll do that. Thanks!