whether regressionenseblepredict block can be used in hdl coder?

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whether regressionenseblepredict block can be used in hdl coder?
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Nandhu mol M. V
Nandhu mol M. V on 20 Jun 2023
% Load the engine_dataset
load engine_dataset
% Prepare the data
X = engineInputs.';
Y= engineTargets.';
% Split the data into training and testing sets
cv = cvpartition(size(X,1),'HoldOut',0.2);
Xtrain = X(cv.training,:);
Ytrain = Y(cv.training,:);
Xtest = X(cv.test,:);
Ytest = Y(cv.test,:);
% Train the Gradient Boosting model
Model1 = fitrensemble(Xtrain,Ytrain(:,1),'Method','LSBoost','NumLearningCycles',500,'Learners',templateTree('MaxNumSplits',10));
Model2 = fitrensemble(Xtrain,Ytrain(:,2),'Method','LSBoost','NumLearningCycles',500,'Learners',templateTree('MaxNumSplits',10));
sampleTime = 1;
numSteps = 1199;
time = sampleTime*(0:numSteps-1);
time = time';
simin = timeseries(X,time);
simout = timeseries(Y,time);
model = 'SimMdlName_V1';
% Predict on test data and calculate errors
Ypred1 = predict(Model1, Xtest);
Ypred2 = predict(Model2, Xtest);
error1 = Ytest(:,1) - Ypred1;
error2 = Ytest(:,2) - Ypred2;
% Plot the errors
figure;
subplot(2,1,1);
plot(error1);
title('Error in y1');
ylabel('Error');
subplot(2,1,2);
plot(error2);
title('Error in y2');
ylabel('Error');
xlabel('Sample');
system_under_design = [model '/Gradient Boost Predict Model'];
baseline_output = [model '/yarr'];
open_system(model);
hdlsetup(model);
loggingInfo = get_param(model, 'DataLoggingOverride');
sim_out = sim(model, 'SaveFormat', 'Dataset');
plotRegression(sim_out, baseline_output, system_under_design, 'Regression before conversion');
opts = fxpOptimizationOptions();
opts.addTolerance(system_under_design, 1, 'RelTol', 0.05);
opts.addTolerance(system_under_design, 1, 'AbsTol', 50)
opts.AllowableWordLengths = 8:32;
solution = fxpopt(model, system_under_design, opts);
best_solution = solution.explore;
set_param(model, 'DataLoggingOverride', loggingInfo);
Simulink.sdi.markSignalForStreaming([model '/yarr'], 1, 'on');
Simulink.sdi.markSignalForStreaming([model '/diff'], 1, 'on');
sim_out = sim(model, 'SaveFormat', 'Dataset');
plotRegression(sim_out, baseline_output, system_under_design, 'Regression after conversion');
sim_out = sim(model, 'SaveFormat', 'Dataset');
plotRegression(sim_out, baseline_output, system_under_design, 'Regression after function replacement');
systemname = 'SimMdlName_V1/Gradient Boost Predict Model';
workingdir = 'C:/Temp/hdlsrc';
checkhdl(systemname,'TargetDirectory',workingdir,'TargetLanguage','Verilog');
makehdl(systemname,'TargetDirectory',workingdir,'TargetLanguage','Verilog');
makehdltb(systemname,'TargetDirectory',workingdir,'TargetLanguage','Verilog');
this code is showing error with hdl coder.Can anyone help?

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Answers (2)

Kiran Kintali
Kiran Kintali on 6 Oct 2023
Edited: Kiran Kintali on 6 Oct 2023
In general the code you posted cannot be directly be used to generate HDL.
You need to break the code into design.m (DUT) and testbench.m (Testbench around Design under Test) files. See design patterns for MATLAB Coding here https://www.mathworks.com/matlabcentral/fileexchange/50098-hdlcoder-design-patterns-and-examples
>> mlhdlc_demo_setup('heq')
In general functions from Stats and Machine Learning Toolbox are not supported out of the box.
You may want to consider writing the DUT / design.m from first principles using supported subset of MATLAB for HDL Code generation and use HDL Coder for code generation from the MATLAB Code.
HDL Coder enables high-level design for FPGAs, SoCs, and ASICs by generating portable, synthesizable Verilog®, SystemVerilog, and VHDL® code from MATLAB functions, Simulink models, and Stateflow charts. You can use the generated HDL code for FPGA programming, ASIC prototyping, and production design.
You may also find this HDL Coder compatible product helpful for your Machine Learning application.
Deep Learning HDL Toolbox
Prototype and deploy deep learning networks on FPGAs and SoCs
Deep Learning HDL Toolbox provides functions and tools to prototype and implement deep learning networks on FPGAs and SoCs. It provides pre-built bitstreams for running a variety of deep learning networks on supported Xilinx® and Intel® FPGA and SoC devices. Profiling and estimation tools let you customize a deep learning network by exploring design, performance, and resource utilization tradeoffs.
Deep Learning HDL Toolbox enables you to customize the hardware implementation of your deep learning network and generate portable, synthesizable Verilog® and VHDL® code for deployment on any FPGA or SoC (with HDL Coder and Simulink).

Hamid Satarboroujeni
Hamid Satarboroujeni on 14 Dec 2023
Hi Nandhu,
The code you pasted is for training the ensemble model. If you want to use the model in the RegressionEnsemble Predict block and generate HDL code from the block, you can follow the steps in the following question and use my answer to fix the error:
I hope this helps,

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