HDL Coder generates standard VHDL-1993 (IEEE 1076-1993), Verilog-2001 (IEEE 1364-2001), and SystemVerilog-2005 (IEEE 1800-2005) code that is synthesis tool version independent.
The "supported versions" in documentation are what MathWorks explicitly tested at release time - they are NOT hard limitations for HDL code generation.
What Works vs What Requires Tested Version
Works with ANY tool version:
- HDL code generation (makehdl) - pure VHDL/Verilog/SystemVerilog output
- Manual integration of generated code
Requires tested tool version:
- Generic ASIC/FPGA workflow - synthesis and implementation scripts
- IP Core Generation workflow - reference designs tied to specific tool versions
- FPGA-in-the-Loop (FIL) - board support packages are version-specific
- Simulink Real-Time FPGA I/O - same as IP Core
- SoC Builder - integrated workflows
Using Newer Tool Versions
Customers can enable "Allow unsupported version" in HDL Workflow Advisor (Task 1.1) to proceed with untested versions, but:
- IP Core workflows may have integration issues
- Device lists may not auto-populate
- Reference design compatibility not guaranteed
Related MATLAB Central Links
- Which versions of Vivado are supported with which release of MATLAB? - Canonical FAQ
- Which versions of Xilinx Vivado are supported with HDL Workflow Advisor?
- How do I configure HDL Coder so that it recognizes my Vivado version?
- What's the most suitable Vivado version for MATLAB 2025a?
Documentation Links (Always Check these Links in Doc)
- HDL Language Support and Supported Third-Party Tools
- Set Up Tools
- Supported EDA Tools for Intel FPGA
- Supported EDA Tools for Microchip FPGA
- HDL Verifier Supported EDA Tools
Current Tested Versions (R2025b/R2026a)
ToolTested Version
- AMD Vivado 2024.1
- Xilinx ISE 14.7
- Intel Quartus Prime Standard 23.1
- Intel Quartus Pro 23.3
- Microchip Libero SoC 2024.1
- Cadence Genus 21.18
- Cadence Stratus HLS 23.02
- AMD Vitis HLS 2024.2
% Example Setup Scripts; Change the paths accordingly.
% AMD Vivado
hdlsetuptoolpath('ToolName', 'Xilinx Vivado', 'ToolPath', 'C:\Xilinx\Vivado\2025.1\bin\vivado.bat');
% Intel Quartus Prime Standard
hdlsetuptoolpath('ToolName', 'Altera Quartus II', 'ToolPath', 'C:\intel\23.1\quartus\bin\quartus.exe');
% Intel Quartus Pro
hdlsetuptoolpath('ToolName', 'Intel Quartus Pro', 'ToolPath', 'C:\intel\23.3_pro\quartus\bin64\quartus.exe');
% Microchip Libero SoC
hdlsetuptoolpath('ToolName', 'Microchip Libero SoC', 'ToolPath', 'C:\Microchip\Libero_SoC_v2024.1\Designer\bin\libero.exe');