How to programmatically pause and resume UUT Simulation in Test Sequence Block ?

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Is there a way to pause unit uder test, UUT, simulation from test sequence, yet allow test sequence block to execute to evaluate verify statement?
I'm using test sequence to test a state machine that will transition between some of the states strickly based on timer expired; i need a way to pause simulation while it is timing and/or at the timer expiration but before it transition to new state, let test sequence verify some signals, then let it resume simulation back.

Answers (1)

Jesús Zambrano
Jesús Zambrano on 26 May 2021
Maybe you can add one or more breakpoints in different steps so to pause in the moment you prefer. Here I include documentation showing the steps to do it:
Yamen on 30 May 2021
yes, i thought about using the function callbacks after seeing the assert block using it; i have to do all the verification evaluation in there, then when done, resume simulation using "set_param(bdroot,'SimulationCommand','continue')". I was trying to do it all in the test sequence, one place for everything. easily plottable for review puposes, but it seems it is not possible.
I will try to see if the verification can be done easily, modularly, and scalably implemented in a script.
Thank you for your help!

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