Answered
Inferring RAM zero index issue
Can you MATLAB code (dut.m) and a Testbench (dut_tb.m) and the project file with MATLAB to HDL codegen settings? This example...

11 months ago | 0

Answered
Explanation of "Assertion failed port already connected to signal error" when generating using HDL Coder?
This is an unexpected internal error. Reported to the development team. Can you let us know what version of MATLAB / HDL Coder...

11 months ago | 0

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Answered
Generate HDL Code for Simscape Models
Can you share your Simscape model?

11 months ago | 0

Answered
Generating HDL from a Random Number Generator
The mask on the uniform generator has sample time and seed parameters. The uniform generator produces uint32 ...

11 months ago | 1

| accepted

Question


Generating HDL from a Random Number Generator
How do I model Random Number Generator suitable for HDL Coder?

11 months ago | 1 answer | 0

1

answer

Answered
Multiple outputs from HDL block in simulink
https://www.mathworks.com/help/hdlcoder/ug/getting-started-with-axi4-stream-interface-in-zynq-workflow.html Getting Started wit...

11 months ago | 0

Answered
Activation Network Connection Failed in Hardware Setup
Contact support@mathworks.com with reproduction steps.

11 months ago | 0

Answered
Multiple outputs from HDL block in simulink
Can you share your model? Thanks

11 months ago | 0

Answered
How do you make D-FF for HDL coders in simulink?
Hardware Modeling with MATLAB Code MATLABĀ® design and test bench guidelines for HDL code generation Model for HDL Code Gener...

11 months ago | 0

Answered
HDL code for 'findpeak' function
please find attached a pulse detector example. You can find a similar thread here.

12 months ago | 0

Answered
POW2(A) is not supported when A is a FI object.
You are using Variable dimensions and the coding style is not suitable for HDL Code generation or FPGA/ASIC synthesis. Few...

1 year ago | 0

Answered
POW2(A) is not supported when A is a FI object.
Please share your design.m and testbench.m and MATLAB to HDL project file. Thanks

1 year ago | 0

Answered
Error while using HDL coder
Thanks for sharing the reproduction steps. Classes in MATLAB are not supported for fixed-point conversion. The cryptic error a...

1 year ago | 1

Answered
want to convert my simulink model to VHDL using HDL workflow advisor
Does pulse detection example from his thread give you some clues on your approach the problem? https://www.mathworks.com/matlab...

1 year ago | 0

Answered
Error while using HDL coder
Can you share your reproduction steps? It will help with the investigation. Design.m <algorithm you are trying to convert to C/...

1 year ago | 0

Answered
Control the gain variable inside the generated IP block
please review this example Getting Started with Targeting Xilinx Zynq Platform https://www.mathworks.com/help/hdlcoder/ug/gett...

1 year ago | 0

Answered
Hello. I'm traying to generate un HDL code from matlab user-definded function algorithm and got an error about function specialisation that I didn't understand.
Can you share a sample design.m, testbench.m and project file used for fixed point conversion? Thanks

1 year ago | 0

Answered
HDL Code Generation for Hit Crossing Block
HDL code generation is currently not supported for Hit Crossing block. However Hit Crossing block functionality can be implement...

1 year ago | 0

| accepted

Question


HDL Code Generation for Hit Crossing Block
HDL Code generation is not supported for Hit Crossing block. How do you model this block for HDL Code generation using basic blo...

1 year ago | 1 answer | 0

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answer

Answered
MATLAB function block doesn't generate synthesizable HDL.
The issues you were facing are related to mix of incompatible single and double types in the model causing compilation issues ...

1 year ago | 0

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Answered
MATLAB function block doesn't generate synthesizable HDL.
An operator or a block in Simulink can support all floating point types (for input, output and intermediate settings) that are...

1 year ago | 0

Answered
simulink_hdl_coder says unable to check out license, even though the tool has that license checked-out
Please reach out to https://www.mathworks.com/support/contact_us.html Thanks

1 year ago | 0

Answered
What are MIL, SIL, PIL, and HIL, and how do they integrate with the Model-Based Design approach?
In a HIL setup, Simulation of plant models can be pretty compute intensive and challenging for CPU based simulators. Simscape t...

1 year ago | 0

Answered
MATLAB function block doesn't generate synthesizable HDL.
https://www.mathworks.com/help/hdlcoder/release-notes.html R2019b New Features, Bug Fixes Model and Architecture Design HDL ...

1 year ago | 0

Answered
Error in using rate transition for multiple clock domains
Some init scripts might be missing when I ctrl-d the model. For example I get the error. Variable 'activeLines' does not exis...

1 year ago | 0

Answered
How to create a single dsp model that can be used for different fpga vendors (HDLcoder)
You can generate HDL code from variants. Attached is an example of the variant subsystem model using basic variant features. ...

1 year ago | 1

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Answered
R2020b Update 6 Crashes After Opening HDL Workflow Advisor
This is helpful. This looks like error is happening during model compilation or simulation and unrelated to code generation. I w...

1 year ago | 0

Answered
R2020b Update 6 Crashes After Opening HDL Workflow Advisor
This is not expected behavior. To workaround the issue can you reach out to https://www.mathworks.com/support/contact_us.html? ...

1 year ago | 0

Answered
How to assign the name of a (multiple) port while using HDL Coder generate RTL from simulink
Resource Sharing For Area Optimization Additional Help for Sharing Factor https://www.mathworks.com/support/search.html?q=...

1 year ago | 0

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