HDL Coder Buffer Problem

6 views (last 30 days)
Catteau Ophélie
Catteau Ophélie on 23 Mar 2021
Hello everyone,
I am trying to update this subsystem (below) for HDL generation but I don't know how to replace the buffer. Someone can help me please ?
Thank you a lot

Answers (1)

Kiran Kintali
Kiran Kintali on 23 Mar 2021
Can you attach the model? Thanks
  6 Comments
Catteau Ophélie
Catteau Ophélie on 24 Mar 2021
Edited: Catteau Ophélie on 24 Mar 2021
yes, I have considered that but I didn't give me the right output if I use bitreverse option and I already use it
Bharath Venkataraman
Bharath Venkataraman on 26 Mar 2021
You can use a bank of 8 RAM blocks and use an HDL counter block to create write addresses and another to create read addresses. You can write in serial order 0, 1, ..7, 8, ... and read in bit reversed order, or the other way around. Since you are processing 8 samples of data per cycle, you will need to write the 8 samples of data in a way that you are able to read the right 8 samples at a time on the read side. Rather than using the valid for an enabled subsystem, I suggest using it as a write enable input to the RAM blocks.
I am curious to know why you think the natural order output (uncheck the option Output in bit-reversed order) is not working correctly. There is logic in that block that implements the bit-reversal I mention above.
One other thing I want to mention is that it is not clear that your input is being generated and passed in correctly. You may want to generate all your input in MATLAB (as many samples as you want), then using the Signal From Workspace block to send it 8 samples at a time to the FFT HDL Optimized block.

Sign in to comment.

Products


Release

R2019a

Community Treasure Hunt

Find the treasures in MATLAB Central and discover how the community can help you!

Start Hunting!